A. Allam

A 2–16 GHz CMOS current reuse cascaded ultra-wideband low noise amplifier

This paper presents the design of a 2–16 GHz ultra wide band low noise amplifier (UWB LNA). The proposed LNA has a gain of 11.5 ± 0.85 dB with NF less than 2.82 dB. Good input and output impedance matching, good isolation and linearity are achieved over the operating frequency band. The proposed UWB LNA consumes 18.14 mW of power from 1.8V supply. This UWB LNA is designed and simulated in 0.18 μm CMOS process.

CMOS Ultra-Wideband Low Noise Amplifier Design

This paper presents the design of ultra-wideband low noise amplifier (UWB LNA). The proposed UWB LNA whose bandwidth extends from 2.5u2009GHz to 16u2009GHz is designed using a symmetric 3D RF integrated inductor. This UWB LNA has a gain of 11 ± 1.0u2009dB and a NF less than 3.3u2009dB. Good input and output impedance matching and good isolation are achieved over the operating frequency band. The proposed UWB LNA is driven from a 1.8u2009V supply. The UWB LNA is designed and simulated in standard TSMC 0.18u2009µm CMOS technology process.

Design of 3D integrated inductors for RFICs

This paper discusses the design of 3D monolithic integrated inductors. The proposed 3D radio frequency (RF) integrated inductors have high inductance (L) values with an enhanced quality factors (Q). A new proposed method for 3D integrated inductors design is presented. A wide range of inductances and quality factor values can be realized. The proposed 3D inductors were designed in TSMC 0.18 μm technology and simulated using momentum.

5.0 to 10.6 GHz 0.18 µm CMOS power amplifier with excellent group delay for UWB applications

The optimization technique to realize the minimum group delay (GD) of a 5-10.6 GHz, two stages CMOS Ultra Wideband power amplifier (UWB-PA) is presented and implemented in 0.18 μm CMOS technology. The fabricated UWB-PA has a power gain (|S21|) of 14± 1 dB, maximum power added efficiency and an output 1-dB compression of 10 %, and 2 dBm, respectively at 6 GHz. In addition, the PA has an excellent small group delay variation of 147± 40 ps with power consumption of 20 mW and this is the smallest variations among CMOS PAs so far reported.

An eight-phase CMOS injection locked ring oscillator with low phase noise

This paper presents the design of a low DC power, low phase noise single-ended ring oscillator (RO) in 0.18 μm CMOS technology. It introduces a new RO output phase control technique. This RO uses a voltage pull-down circuit to produce different output signal phases. The proposed RO employs the pulse injection (PI) technique for phase noise and spurious signals suppression. The proposed injection locked ring oscillator (ILRO) can be used for phase shift keying (PSK) implementation. The proposed ILRO has an oscillation frequency of 4.5 GHz with a fine tuning range of 540 MHz. It consumes only a 4.25 mW of power while having a phase noise of -130.9 dBc/Hz @ 1MHz offset. Through this ILRO design, a figure of merit (FoM) of -197.68 dBc/Hz has been achieved.

A high-efficiency good linearity 21 to 26.5 GHz fully integrated power amplifier using 0.18 μm CMOS technology

This paper presents the design and implementation of a 21–26.5 GHz broadband, two stages CMOS power amplifier (PA) for quasi-millimeter wave band wireless communication systems. The proposed PA is designed using staggered tuning method [1], which is employed for the first time in quasi-millimeter wave band. Moreover, source and load-pull simulation, in addition to, impedance analysis are employed to optimize the input, output, and inter-stage impedance matching circuits for maximum power added efficiency (PAE) and better linearity. The measurement results on a chip fabricated using 0.18 μm CMOS technology shows a power gain of 10.2 ± 0.8 dB, a maximum PAE and output gain compression point (Pout1dB) of 10.5 dBm and 18 %, respectively, at 24 GHz while consuming 42 mW only. In addition, the PA achieved excellent low measured group delay variations of 75 ± 22 ps.

A compact ultra-wideband monopole antenna for breast cancer detection

In this manuscript, a very compact UWB monopole antenna with large bandwidth, for breast cancer detection is designed and fabricated. The designed antenna has a size 10.2 mm×15.5 mm and operates over a frequency range from 4.23 GHz up to more than 14 GHz. The proposed antenna shows a sufficient variation of transmission response, displays good omnidirectional radiation patterns, gain level reaching to 5.17 dB, radiation efficiency above 85% over the operating band, high fidelity reaching to 0.965 and the maximum variation in a group delay is 0.25 ns. The proposed design achieves the specifications of the element to use in an antenna array for breast cancer detection.

A high efficiency 3–7 GHz class AB CMOS power amplifier for WBAN applications

The design of 3-7 GHz class AB two stages power amplifier (PA) for wireless body area network (WBAN) applications in TSMC 0.18 μm is presented. Source and Load-pull contours are employed in order to maximize power added efficiency. The post-layout simulation results of the proposed UWB-PA indicated that the power gain (S21) is 12 dB ± 0.8; the input return loss (S11) and the output return loss (S22) are less than -10 dB and -11 dB respectively over the frequency range from 3 GHz to 7 GHz. In addition, The PA achieved maximum power added efficiency (PAE) of 38.5% at 5 GHz and an output 1-dB compression of 7.21 dBm at the same frequency. Moreover, a group delay variation of ± 32.5 ps was achieved through the frequency band of interest.

CMOS ultra-wideband low noise amplifier (UWB-LNA) using symmetric 3D RF integrated inductor

This paper presents the design of a 2-16 GHz ultra wideband low noise amplifier (UWB LNA). The proposed UWB LNA employs a symmetric 3D RF integrated inductor. The UWB LNA has a gain of 11 ± 1.0 dB with NF less than 3.25 dB. Good input and output impedance matching and good isolation are achieved over the operating frequency band. The proposed UWB LNA is driven from a 1.8V supply. This UWB LNA is designed and simulated in the standard 0.18 μm CMOS technology.

Compact 24GHz half-slot antenna for energy combining

A compact half-slot microstrip antenna is proposed in this paper. The antenna consists of microstrip line-fed half slot, and an open-circuited stub is connected to the microstrip feed line to adjust the matching at the operated frequency band. A half slot is used for miniaturization, as well as due to concentrating the field at only half slot; consequently, it decreases the resonance frequency and improves the antenna radiation characteristics. The antenna radiates at 24 GHz with measured fractional impedance bandwidth of 9%. The antenna gain at the resonant frequency is 5.2 dBi. The proposed antenna shows about 60% length reduction. Therefore, the proposed half slot antenna could be used for energy harvesting applications, at 24 GHz ISM band, due to its compact size with improved gain value. The proposed antenna was designed using ANSYS high-frequency structure simulator (HFSS). The simulated and measured results show good agreement.