A. B. Limanov

Low Temperature Polycrystalline Si TFTs Fabricated with Directionally Crystallized Si Film

The comparison of TFTs fabricated on films processed by conventional excimer laser an- nealing (ELA) and sequential lateral solidification (SLS) demonstrates the dependence of the device characteristics on the microstructure of the device channel region. We report the perform- ance characteristics of non-self-aligned coplanar n- and p-channel low temperature TFTs fabricated on 1000-A-thick films on Corning 1737 glass substrates that were directionally solidified using SLS. The devices were aligned so that the grain boundaries were parallel to the direction of the source-drain current flow. These results were compared with those obtained from devices fabricated on conventional ELA-processed polycrystalline Si films (with average grain size of ∼3000 A) with identical methods. The values for channel mobility obtained from the SLS TFTs are ∼370 cm 2 /Vsec for n-channel and ∼140 cm 2 /Vsec for p-channel devices, compared to ∼100 and ∼60 respectively for ELA TFTs. Other device characteristics of SLS TFTs were I on /I off > 10 7 at Vd=0.1V, and subthreshold slopes less than 0.5V/dec. We further discuss the physical implications of the results and present additional details of the devices.

Sequential Lateral Solidification of PECVD and Sputter Deposited a-Si Films

We have investigated sequential lateral solidification (SLS) of amorphous Si films that have been prepared via PECVD and sputter deposition methods. The focus of the work was on identifying and analyzing the energy density and per-pulse translation distance parameter space that permits SLS of these films. Experimental details include the use of a two-axisprojection irradiation system to image a straight-slit beamlet pattern onto the sample, and analyzing the resulting microstructures by SEM and optical microscopy of Secco-etched samples. High-temperature-deposited LPCVD films were also examined to enable further comparative analysis. We conclude from these results that there are no major differences in both the SLS process characteristics and the resulting microstructure among the investigated films (provided that the films are dehydrogenated in the case of PECVD a-Si). Based on the controlled super-lateral growth (C-SLG) model of the SLS process, we attribute these findings to the fact that the SLS method involves—as one of its essential features—complete melting of the Si film at fluences that are sufficient to thoroughly melt crystalline Si films, during which all pre-irradiation phase and microstructural details are erased.

The Dependence of Poly-Si TFT Characteristics on the Relative Misorientation Between Grain Boundaries and the Active Channel

We present device-related experimental results that quantitatively reveal the effect of varying the active channel/grain-boundary misorientation on the resulting TFT characteristics. Specifically, using low-temperature SLS processes, we have fabricated and analyzed n-channel and p-channel devices (40 μm width × 8 μm length) with three different orientations of the channel with respect to the grain boundaries: parallel, 45° inclined, and perpendicular on Corning 1737 glass substrates. The results reveal that the TFTs with the best (worst) characteristics were obtained for the devices with parallel (perpendicular) alignment. In general, for both n- and p-channel devices, the most prominent orientation-dependent effects were observed in the values of the field effect mobilities, which were 340, 227, and 141 cm 2 /Vsec for n-channel devices and 145, 105, and 80 cm 2 /Vsec for p-channel devices, in the order of increasing orientation mismatch. In contrast, no notable effect was manifested in the leakage currents, while small effects were seen for the sub-threshold slopes and threshold voltages. The degradation of device performance under hot-carrier stress was found to decrease with increasing orientation mismatch.

34.4: High Performance CMOS‐on‐Plastic Circuits using Sequential Laterally Solidified Silicon TFTs

We developed a CMOS-on-plastic technology using sequential lateral solidification to form LTPS TFTs. We have achieved unity-gain frequencies ft greater than 250 MHz, with CMOS ring oscillators operating at 100 MHz. To our knowledge these are the highest frequency transistors and circuits ever fabricated directly on plastic.

Sequential Lateral Solidification of Silicon Thin Films on Cu BEOL-Integrated Wafers for Monolithic 3-D Integration

We demonstrate that wafers integrated with copper (Cu) Damascene interconnects are suitable substrates for the excimer laser crystallization of silicon thin films. This approach allows for the monolithic 3-D integration of transistors on the back end of line (BEOL) of silicon wafers for VLSI monolithic 3-D integration. This is supported by a 1-D finite-element method simulation of the integrated structure, which shows that, upon excimer laser irradiation, the temperature of the buried Cu layer stays below 320 °C, which is a favorable condition for monolithic 3-D integration. The crystallization of a 100-nm amorphous silicon layer on a 1-μm SiO2 dielectric is demonstrated on a BEOL-integrated wafer. The Raman spectrum of the silicon layer after laser irradiation shows a polycrystalline peak centered around 513 cm-1. Optical microscopy shows polycrystalline silicon with no physical damage of the Cu lines. The electrical characterization of the Cu buried layer, with and without undergoing the irradiation process, shows no variation or degradation in Cu conductivity.

Sequential lateral solidification of silicon thin films on low-k dielectrics for low temperature integration

We present the excimer laser crystallization of amorphous silicon on a low dielectric constant (low-k) insulator for very large scale integration monolithic 3D integration and demonstrate that low dielectric constant materials are suitable substrates for 3D integration through laser crystallization of silicon thin films. We crystallized 100 nm amorphous silicon on top of SiO2 and SiCOH (low-k) dielectrics, at different material thicknesses (1 μm, 0.75 μm, and 0.5 μm). The amorphous silicon crystallization on low-k dielectric requires 35% less laser energy than on an SiO2 dielectric. This difference is related to the thermal conductivity of the two materials, in agreement with one dimensional simulations of the crystallization process. We analyzed the morphology of the material through defect-enhanced microscopy, Raman spectroscopy, and X-ray diffraction analysis. SEM micrographs show that polycrystalline silicon is characterized by micron-long grains with an average width of 543 nm for the SiO2 sample and...

100 MHz CMOS circuits using sequential laterally solidified silicon thin-film transistors on plastic

We have fabricated CMOS circuits using sequential laterally solidified silicon TFTs on plastic substrates. NMOS devices have unity-gain frequencies greater than 250 MHz, and CMOS ring oscillators operate at 100 MHz. To our knowledge these are the highest performance transistors and the fastest circuits ever fabricated directly on plastic

CMOS-on-Plastic Technology using Sequential Laterally Solidified Silicon Thin-Film Transistors

CMOS circuits are directly fabricated on plastic substrates using a process with a maximum temperature of 300degC. NMOS transistors with 2mum channel lengths have unity-gain frequencies greater than 250MHz, and CMOS ring oscillators operate at 100MHz with a 15V supply

Controlled super lateral growth enhancement of single pulse laser irradiation by heat-retaining layer

Single-pulse excimer-laser-induced enhancement of lateral crystallization by applying a heat-retaining capping layer on amorphous silicon is well confirmed. Through analysis of polycrystalline silicon microstructure and of transient reflectance signal, we found that the capped sample had a 7 /spl mu/m lateral growth, along with an 1800 ns increased melt duration, which is one order of magnitude larger than the uncapped sample.