A. Himmi

CMOS pixel sensor development: a fast read-out architecture with integrated zero suppression

CMOS Monolithic Active Pixel Sensors (MAPS) have demonstrated their strong potential for tracking devices, particularly for flavour tagging. They are foreseen to equip several vertex detectors and beam telescopes. Most applications require high read-out speed, which imposes sensors to feature digital output with integrated zero suppression. The most recent development of MAPS at IPHC and IRFU addressing this issue will be reviewed. The design architecture, combining pixel array, column-level discriminators and zero suppression circuits, will be presented. Each pixel features a preamplifier and a correlated double sampling (CDS) micro-circuit reducing the temporal and fixed pattern noises. The sensor is fully programmable and can be monitored. It will equip experimental apparatus starting data taking in 2009/2010.

First test results Of MIMOSA-26, a fast CMOS sensor with integrated zero suppression and digitized output

The MIMOSA pixel sensors developed in Strasbourg have demonstrated attractive features for the detection of charged particles in high energy physics. So far, full-size sensors have been prototyped only with analog readout, which limits the output rate to about 1000 frames/second. The new MIMOSA 26 sensor provides a 2.2 cm2 sensitive surface with an improved readout speed of 10,000 frames/second and data throughput compression. It incorporates pixel output discrimination for binary readout and zero suppression micro-circuits at the sensor periphery to stream only fired pixel out. The sensor is back from foundry since february 2009 and has being characterized in laboratory and in test beam. The temporal noise is measured around 13-14 e- and an operation point corresponding to an efficiency of 99.5±0.1 % for a fake rate of 10-4 per pixel can be reached at room temperature. MIMOSA 26 equips the final version of the EUDET beam telescope and prefigures the architecture of monolithic active pixel sensors (MAPS) for coming vertex detectors (STAR, CBM and ILC experiments) which have higher requirements. Developments in the architecture and technology of the sensors are ongoing and should allow to match the desired readout speed and radiation tolerance. Finally, the integration of MAPS into a micro-vertex detector is addressed. A prototype ladder equipped, on both sides, with a row of 6 MIMOSA 26-like sensors is under study, aiming for a total material budget about 0.3% X0.

CMOS monolithic active pixel sensors for minimum ionizing particle tracking using non-epitaxial silicon substrate

Nonepitaxial, high resistivity silicon has been used as a substrate for implementation of CMOS monolithic active pixel sensors (MAPS) designed for high precision minimum ionizing particle tracking. The readout electronics circuitry is integrated directly on top of such a substrate using a standard commercial CMOS process. In this paper, measurements of these devices using a high-energy particle beam are presented. Efficient and performing MIP tracking is demonstrated for both small (20 /spl mu/m) and large (40 /spl mu/m) pixel readout pitch. Radiation hardness that satisfies many future particle physics applications is also proven. These results show that the use of epitaxial substrate for MAPS fabrication is not mandatory, opening a much larger choice of possible CMOS processes in the future.

Performance of a Fast Binary Readout CMOS Active Pixel Sensor Chip Designed for Charged Particle Detection

We report on the performance of the MIMOSA8 (HiMAPS1) chip. The chip is a 128times32 pixels array where 24 columns have discriminated binary outputs and eight columns analog test outputs. Offset correction techniques are used extensively in this chip to overcome process related mismatches. The array is divided in four blocks of pixels with different conversion factors and is controlled by a serially programmable sequencer. MIMOSA8 is a representative of the CMOS sensors development option considered as a promising candidate for the Vertex Detector of the future International Linear Collider (ILC). The readout technique, implemented on the chip, combines high spatial resolution capabilities with high processing readout speed. Data acquisition, providing control of the chip and signal buffering and linked to a VME system, was made on the eight analog outputs. Analog data, without and with a 55Fe X-ray source, were acquired and processed using off-line analysis software. From the reconstruction of pixel clusters, built around a central pixel, we deduce that the charge spread is limited to the closest 25 pixels and almost all the available charge is collected. The position of the total charge collection peak (and subsequently the charge-to-voltage conversion factor) stays unaffected when the clock frequency is increased even up to 150 MHz (13.6 mus readout time per frame). The discriminators, placed in the readout chain, have proved to be fully functional. Beam tests have been made with high energy electrons at DESY (Germany) to study detection efficiency. The results prove that MIMOSA8 is the first and fastest successful monolithic active pixel sensor with on-chip signal discrimination for detection of MIPs

A fast monolithic active pixel sensor with pixel-level reset noise suppression and binary outputs for charged particle detection

In order to develop precision vertex detectors for the future linear collider, fast monolithic active pixel sensors are studied. A standard CMOS 0.25 mum digital process is used to design a test chip which includes different pixel types, column-level discriminators, and a fully programmable digital sequencer. In-pixel amplification is implemented together with double sampling. Different charge-to-voltage conversion factors were obtained using amplifiers with different gains or diode sizes. Pixel architectures with dc and ac coupling to charge sensing element were proposed. Hits from conversion of 55Fe photons were recorded for the dc-coupled and ac-coupled pixel versions. Double sampling is functional and allows almost a complete cancellation of fixed pattern noise

A reticle size CMOS pixel sensor dedicated to the STAR HFT

ULTIMATE is a reticle size CMOS Pixel Sensor (CPS) designed to meet the requirements of the STAR pixel detector (PXL). It includes a pixel array of 928 rows and 960 columns with a 20.7 μm pixel pitch, providing a sensitive area of ~ 3.8 cm2. Based on the sensor designed for the EUDET beam telescope, the device is a binary output sensor with integrated zero suppression circuitry featuring a 320 Mbps data throughput capability. It was fabricated in a 0.35 μm OPTO process early in 2011. The design and preliminary test results, including charged particle detection performances measured at the CERN-SPS, are presented.

Optimization of Tracking Performance of CMOS Monolithic Active Pixel Sensors

CMOS Monolithic Active Pixel Sensors (MAPS) provide an attractive solution for high precision tracking of minimum ionizing particles. In these devices, a thin, moderately doped, undepleted silicon layer is used as the active detector volume with the readout electronics implemented on top of it. Recently, a new MAPS prototype was fabricated using the AMS 0.35 mum OPTO process, featuring a thick epitaxial layer. A systematic study of tracking performance of that prototype using high-energy particle beam is presented in this work. Noise performance, signal amplitude from minimum ionizing particles, detection efficiency, spurious hit suppression and spatial resolution are shown as a function of the readout pitch and the charge collecting diode size. A test array with a novel readout circuitry was also fabricated and tested. Each pixel circuit consists of a front-end voltage amplifier, capacitively coupled to the charge collecting diode, followed by two analog memory cells. This architecture implements an on-pixel correlated double sampling method, allowing for optimization of integration independently of full frame readout time and strongly reduces the pixel-to-pixel output signal dispersion. First measurements using this structure are also presented

Monolithic active pixel sensors with in-pixel double sampling operation and column-level discrimination

Monolithic Active Pixel Sensors constitute a viable alternative to Hybrid Pixel Sensors and Charge Coupled Devices for the next generation of vertex detectors. Possible application will strongly depend on a successful implementation of on-chip hit recognition and sparsification schemes. These are not a trivial task, first because of very small signal amplitudes (/spl sim/mV), originated from charge collection, which are of the same order as natural dispersions in a CMOS process, secondly because of the limitation to use only one type of transistor over the sensitive area. The paper presents a 30 /spl times/ 128 pixel prototype chip, featuring fast, column parallel signal processing. The pixel concept combines on-pixel amplification with double sampling operation. The pixel output is a differential current signal proportional to the difference between the charges collected in two consecutive time slots. The readout of the pixel is two-phase, matching signal discrimination circuitry implemented at the end of each column. The design of low-noise discriminators includes automatic compensation of offsets for individual pixels. The details of the chip design are presented. Difficulties, encountered from being the first attempt to address on-line hit recognition, are reported. Performances of the pixel and discriminator blocks, determined in separate measurements, are discussed. The essential part of the paper consists of results of first tests performed with soft X-rays from a /sup 55/Fe source.

Radiation tolerance of a column parallel CMOS sensor with high resistivity epitaxial layer

CMOS Monolithic Active Pixel Sensors (MAPS) demonstrate excellent performances in the field of charged particle tracking. A single point resolution of 1–2 μm and a detection efficiency close to 100% were routinely observed with various MAPS designs featuring up to 106 pixels on active areas as large as 4 cm2[1]. Those features make MAPS an interesting technology for vertex detectors in particle and heavy ion physics. In order to adapt the sensors to the high particle fluxes expected in this application, we designed a sensor with fast column parallel readout and partially depleted active volume. The latter feature was expected to increase the tolerance of the sensors to non-ionizing radiation by one order of magnitude with respect to the standard technology. This paper discusses the novel sensor and presents the results on its radiation tolerance.

Development of binary readout CMOS monolithic sensors for MIP tracking

Recently, CMOS monolithic active pixels sensors (MAPS) have become strong candidates for pixel detectors used in high energy physics experiments. A very good spatial resolution can be obtained with these detectors (lower than 5 microns). A recent fast MAPS chip, designed on AMS CMOS 0.35 mum Opto process and called MIMOSA16 (HiMAPS2), was submitted to foundry in June 2006. The pixel array is addressed row-wise. The chip is a 128 times 32 pixels array where 8 columns have analog test outputs and 24 have their outputs connected to offset compensated discriminator stages. The array is divided in four blocks of pixels with different conversion factors and is controlled by a serially programmable sequencer. Discriminators have a common adjustable threshold. The sequencer operates as a pattern generator which delivers control signals both to the pixels and to the column-level discriminators. This chip is the basis of the final sensor of the EUDET-JRA1 beam telescope which will be installed at DESY in 2009. In this paper, laboratory tests results using a 55Fe source together with beam tests results made at CERN using minimum ionizing particles (MIPs) are presented.