A. S. Kashyap

Power Conversion With SiC Devices at Extremely High Ambient Temperatures

This paper evaluates the capability of SiC devices for operation under extremely high ambient temperatures. To this end, the authors packaged SiC JFET and Schottky barrier diodes (SBD) in thermally stable packages and built a high-temperature inductor to be evaluated in a DC-DC buck converter. The DC characteristics of the SiC JFET devices were first measured at ambient temperatures ranging from room temperature up to 450 degC. The experimental results show that the device can operate at 450 degC, which is impossible for conventional Si devices, but as expected the current capability of the SiC JFET diminishes with rising temperatures. A DC-DC converter was then designed and built in accordance with the static characteristics of the SiC JFETs that were measured under extremely high ambient temperatures. The converter was tested up to an ambient temperature of 400 degC. The conduction loss of the SiC JFET increases slightly, as predicted from its DC characteristics, but its switching characteristics hardly change with increasing temperatures. Thus, SiC devices are well suited for operation in harsh temperature environments

A 55-kW Three-Phase Inverter With Si IGBTs and SiC Schottky Diodes

Silicon carbide (SiC) power devices are expected to have an impact on power converter efficiency, weight, volume, and reliability. Currently, only SiC Schottky diodes are commercially available at relatively low current ratings. Oak Ridge National Laboratory has collaborated with Cree and Semikron to build a Si insulated-gate bipolar transistor-SiC Schottky diode hybrid 55-kW inverter by replacing the Si p-n diodes in Semikrons automotive inverter with Crees made-to-order higher current SiC Schottky diodes. This paper presents the developed models of these diodes for circuit simulators, shows inverter test results, and compares the results with those of a similar all-Si inverter.

A 55 kW three-phase inverter with Si IGBTs and SiC Schottky diodes

Silicon carbide (SiC) power devices are expected to have an impact on power converter efficiency, weight, volume, and reliability. Presently, only SiC Schottky diodes are commercially available at relatively low current ratings. Oak Ridge National Laboratory has collaborated with Cree and Semikron to build a Si IGBT-SiC Schottky diode hybrid 55kW inverter by replacing the Si pn diodes in Semikrons automotive inverter with Crees made-to-order higher current SiC Schottky diodes. This paper presents the developed models of these diodes for circuit simulators, shows inverter test results, and compares the results to those of a similar all-Si inverter.

Power Conversion with SiC Devices at Extremely High Ambient Temperatures

This paper evaluates the capability of SiC devices for operation under extremely high ambient temperatures. To this end, the authors packaged SiC JFET and Schottky barrier diodes (SBD) in thermally stable packages and built a high-temperature inductor to be evaluated in a DC-DC buck converter. The DC characteristics of the SiC JFET devices were first measured at ambient temperatures ranging from room temperature up to 450 degC. The experimental results show that the device can operate at 450 degC, which is impossible for conventional Si devices, but as expected the current capability of the SiC JFET diminishes with rising temperatures. A DC-DC converter was then designed and built in accordance with the static characteristics of the SiC JFETs that were measured under extremely high ambient temperatures. The converter was tested up to an ambient temperature of 400 degC. The conduction loss of the SiC JFET increases slightly, as predicted from its DC characteristics, but its switching characteristics hardly change with increasing temperatures. Thus, SiC devices are well suited for operation in harsh temperature environments

Characterization of SiC JFET for Temperature Dependent Device Modeling

Silicon Carbide (SiC) is considered the wide band gap semiconductor material that can presently compete with silicon (Si) material for power switching devices. Compact circuit simulation models for SiC devices are of utmost importance for designing and analyzing converter circuits; in particular, if comparisons with Si devices will be performed. The SiC power switching device structure and composition inevitably differs from those of conventional Si devices so as to harness the superiority of the material. The operational characteristics of the device thus are different from those of conventional Si devices. These characteristics cannot be accurately predicted by current Si power device models. Hence, the motivation to develop circuit simulation models for SiC devices. Moreover, SiC transistors have not been characterized as thoroughly as diodes. This paper characterizes SiC JFETs for the purpose of modeling and parameter extraction which can then be utilized in circuit simulations. The characterization is based on the dc (current-voltage) characteristic measurements using a curve tracer and on the ac (capacitance [impedance] — voltage) measurements using an impedance analyzer. Noting that characterization data for SiC JFETs are only available up to an ambient temperature of 250°C, the device is characterized from room temperature to 450°C demonstrating the high temperature operation of SiC JFETs. To this end, the devices were packaged in dedicated high temperature packages, and measurement fixtures were specially fabricated to withstand high ambient temperatures. The body diode buried in the evaluated SiC JFET is also characterized for potential synchronous rectifier applications.

Compact Modeling of LDMOS Transistors for Extreme Environment Analog Circuit Design

The cryogenic characterization (93 K/-180°C to 300 K/27°C) and compact modeling of a high-voltage (HV) laterally diffused MOS (LDMOS) transistor that exhibits carrier freeze-out are presented in this paper. Unlike low-voltage MOS devices, it was observed that HVMOS structures experience freeze-out effects at much higher temperatures, resulting in an output current roll-off beyond a transition temperature. Standard compact models generally do not guarantee performance below 218 K (-55°C), and freeze-out effects are certainly not incorporated in them. This causes the models to fail to track at lower temperatures, and designers relying on these models would be misled. In this paper, the temperature-scaling equations of the MOS Model 20 LDMOS model are modified to reflect the device operation down to 93 K, which is sufficient for designing sensor interface circuitry for lunar applications. The model is then validated against an LDMOS device designed by engineers at the Jet Propulsion Laboratory, using the IBM SiGe 5AM process. A modified parameter extraction procedure has also been developed. This generalized approach is compact model friendly and can also be implemented for other standard models. Analog circuits designed with this new model are currently being tested at the International Space Station.

Characterization of SiC diodes in extremely high temperature ambient

This paper discusses the static and dynamic behavior of the body diode buried in SiC JFETs and SiC Schottky barrier diodes (SBDs). The device parameters are extracted from experimental results and their temperature dependencies are discussed. There is reverse current flow from source to drain in the channel of JFETs for on condition at low temperatures. In higher temperatures, it tends to flow through the body diode due to the increase of the resistance across the channel. The dynamic characteristics indicate that the reverse recovery phenomena of the body diode in a SiC JFET deteriorates with increasing temperature. It is therefore desirable to add an external SiC SBD for improving the static and dynamic behavior for high temperature operation of SiC JFETs.

Modeling vertical channel junction field effect devices in silicon carbide

The electrical characterization and model development for silicon carbide (SiC) vertical channel SIT and JFET structures are presented in this work. A compact model is developed based on the device geometry and SiC material properties. Northrop Grumman validates the model against measured data at 25 /spl deg/C and 100 /spl deg/C for a prototype 0.03 cm/sup 2/ SiC SIT provided. The models on-state and transient characteristics are validated over this temperature range. Validation of the model shows excellent agreement with measured data. The physics-based approach implemented in this model is crucial to describing the transient behavior over a wide range of application conditions and temperature ranges.

The modeling and characterization of silicon carbide thyristors

The U.S. electric grid is moving down a path of modernization and SiC-based thyristor devices may play a role in that transformation. This paper reports two primary contributions - (a) accurate physics based modeling and characterization of a SiC p-type thyristor, and (b) developing and codifying a generalized parameter extraction strategy for the Lumped-Charge modeling method, making it feasible to apply this technique for any bipolar device - beyond the thyristor. The level-3 physics based model incorporating SiC material and device geometry is highly accurate, replicating device capacitances, lifetimes, and non-quasi-static effects present in the actual device. A 1 kV/36 A p-type SiC thyristor provided by Cree was used to validate the model. Special test jigs were also designed and used to fully characterize the dc and transient performance of the device, ensuring precise measurements and safety of the user.

Cryogenic characterization of lateral DMOS transistors for lunar applications

The characterization and device physics study of a lateral DMOS transistor in the cryogenic regime (∼ + 20 °C to − 180 °C) is presented in this paper. Normally, the characteristics of lateral MOSFETs improve with decreasing temperature. However, the asymmetrical nature of LDMOS devices, owing to the presence of a lightly doped drift region, causes the behavior to deviate from the expected characteristics at deep cryo temperatures. The output current is expected to increase with decreasing temperature, but our observations indicate that the current initially increases and then starts decreasing after a certain transition temperature. This is attributed to the carrier freeze-out phenomenon occurring in the drift region due to lower ionization energies available to the carriers. The paper will report results on the transfer and output characteristics of the JPL LDMOS devices as temperature decreases and attempt to explain the observation with physical reasoning.