A. Thanailakis

A cellular automaton model for the effects of population movement and vaccination on epidemic propagation

A cellular automaton model for the effects of population movement and vaccination on epidemic propagation is presented. Each cellular automaton cell represents a part of the total population that may be found in one of three states: infected, immunized and susceptible. As parts of the population move randomly in the cellular automaton lattice, the disease spreads. We study the effect of two population movement parameters on the epidemic propagation: the distance of movement and the percentage of the population that moves. Furthermore, the model is extended to include the effect of the vaccination of some parts of the population on epidemic propagation. The model establishes the acceleration of the epidemic propagation because of the increment, of the percentage of the moving population, or of the maximum distance of population movement. On the contrary, the effect of population vaccination reduces the epidemic propagation. The proposed model can serve as a basis for the development of algorithms to simulate real epidemics based on real data.

Simulation of electrical tree growth in solid dielectrics containing voids of arbitrary shape

In this paper the electrical tree growth in solid insulating materials containing voids of arbitrary shape is modelled using von Neumanns cellular automata (CA). The model is based upon the assumption that the electric stress at the end of a conducting tip quite often approaches the dielectric strength of the material and that progressive breakdown may occur by electrical tree formation. Because of tree advancement, the potential distribution within the insulating material changes with time, and it is calculated at each time step. An algorithm, based on this model, for the simulation of electrical tree growth in solid dielectrics containing voids of arbitrary shape has been developed. Simulation results show that voids constitute a danger for solid insulation, because they act as sources of secondary electrical trees. An interaction mechanism between voids within a dielectric is proposed and discussed.

Simulation of two-dimensional photoresist etching process in integrated circuit fabrication using cellular automata

A new algorithm for the simulation if photoresist etching, based on cellular automata, is presented in this paper. The algorithm is fast and robust and has been successfully tested using all known etch-rate distribution test functions. The algorithm performs very well, even in areas where the fluctuation in etch rates is wide and sharp.

A CAD system for the construction and VLSI implementation of Cellular Automata algorithms using VHDL

Abstract Cellular Automata (CAs) are models of physical systems where space and time are discrete and interactions are only local. CAs are very effective in simulating physical systems and solving scientific problems, because they can capture the essential features of systems in which global behaviour arises from the collective effect of simple components which interact locally. CAs have been applied successfully to the simulation of several physical systems and processes, and have been extensively used as a very large-scale integrated (VLSI) architecture. We present a CAD system that builds a bridge between CAs as models of physical systems and processes, and CAs as a VLSI architecture. The inputs to our CAD system are the CA dimensionality, lattice size, local rule, and the initial and boundary conditions imposed by the particular problem. Our system produces as output the corresponding VHDL code, which leads to VLSI implementation of the CA algorithm. No prior knowledge of VHDL is required by the user. We have tested our CAD system using well-known one- and two-dimensional CAs, namely the game of life and the rule 90 CAs. The VHDL code produced in all these cases has been used for the automated design of the corresponding VLSI system, using a commercial VLSI CAD system. Simulations of the operation of these VLSI systems showed that the corresponding CA has been successfully implemented into hardware.

A single-electron XOR gate

A new single-electron circuit implementing the logic function XOR is presented in this paper. The logic gate proposed consists of five tunnel junctions, two capacitors and four islands. The operation of this gate is analysed using Monte Carlo simulation. The simulation results show that the gate operates in stable regions.

A methodology for VLSI implementation of Cellular Automata algorithms using VHDL

A methodology for the VLSI implementation of Cellular Automata (CA) algorithms using the VHSIC Hardware Description Language (VHDL) is proposed for the first time. This methodology builds a bridge between the CAs as models of physical systems and processes and the CAs as a VLSI architecture. A translation algorithm is developed that has as input the CA algorithms that simulate physical systems and processes, and as output the corresponding VHDL code. The parameters of this translation algorithm are defined by the user and can be automatically mapped into synthesizable VHDL. An example, where this methodology is applied to the hardware implementation of a CA algorithm for automated visual inspection, is presented.

Electrical properties of a-SiC/c-Si(p) heterojunctions

Electrical properties of heterojunctions consisting of amorphous silicon carbide (a-SiC) on p-type crystalline silicon (c-Si) have been investigated by measuring their current-voltage (I-V) and capacitance-voltage (C-V) characteristics, as well as the temperature dependence of their current (I). The I-V characteristics of a-SiC/c-Si(p) heterojunctions exhibit a low turn-on voltage and a high reverse breakdown voltage (about 140 V). It was found that a model of an abrupt anisotype crystalline heterojunction is valid for the a-SiC/c-Si(p) structure. This model, for values of forward-bias voltage lower than a critical value VT, predicts that at low temperatures (T 250 K) recombination-diffusion becomes the dominant transport mechanism. For higher voltages (V>VT), the tunnelling process dominates in the whole temperature range studied. From I-V measurements of a-SiC/c-Si(p) heterojunctions it was concluded that the conductivity of undoped a-SiC is n-type. Finally, from C-V measurements, the value of electron affinity of a-SiC was obtained, for the first time, and it was found to be chi 1=4.12+or-0.04 eV.

A combined DMA and application-specific prefetching approach for tackling the memory latency bottleneck

Memory latency has always been a major issue in embedded systems that execute memory-intensive applications. This is even more true as the gap between processor and memory speed continues to grow. Hardware and software prefetching have been shown to be effective in tolerating the large memory latencies inherit in large off-chip memories; however, both types of prefetching have their shortcomings. Hardware schemes are more complex and require extra circuitry to compute data access strides, while software schemes generate prefetch instructions, which if not computed carefully may hamper performance. On the other hand, some applications domains (such as multimedia) have a uniform and known a priori memory access pattern, that if exploited, could yield significant application performance improvement. With this characteristic in mind, we present our findings on hiding memory latency using the direct memory access (DMA) mode, which is present in all modern systems, combined with a software prefetch mechanism, and a customized on-chip memory hierarchy mapping. Compared to previous approaches, we are able to estimate the performance and power metrics, without actually implementing the embedded system. Experimental results on nine well known multimedia and imaging applications prove the efficiency of our technique. Finally, we verify the performance estimations by implementing and simulating the algorithms on the TI C6201 processor.

A cellular automaton model for the study of DNA sequence evolution

Cellular automata are introduced as a model for DNA structure, function and evolution. DNA is modeled as a one-dimensional cellular automaton with four states per cell. These states are the four DNA bases A, C, T and G. The four states are represented by numbers of the quaternary number system. Linear evolution rules, represented by square matrices, are considered. Based on this model a simulator of DNA evolution is developed and simulation results are presented. This simulator has a user-friendly input interface and can be used for the study of DNA evolution.

A CAD System for Modeling and Simulation of Computer Networks Using Cellular Automata

The increasing complexity of computer networks calls for the development of new models for their simulation. Cellular automata (CAs) are a well-known and successful model for complex systems. This paper presents a system for modeling and simulation of computer networks based on CAs. More specifically, a 2D NaSch CA computer network model has been developed, and several networks were simulated. Algorithms for connectivity evaluation, system reliability evaluation, and shortest path computation in a computer network have also been implemented. Our system, called Net_CA system, was designed and developed as an interactive tool that offers automated modeling with the assistance of a dynamic and user-friendly graphical environment. The proposed system also produces automatically synthesizable very high speed integrated circuits hardware description language code leading to the parallel hardware implementation of the aformentioned CA algorithms. In terms of circuit design and layout, ease of mask generation, silicon area utilization, and maximization of achievable clock speed, CAs are perhaps the computational structures best suited for a fully parallel very large scale integrated realization. The simulation algorithms developed in the present paper offer high flexibility. Furthermore, connection reliability and other important parameters are inputs to the algorithms, rendering Net_CA a very reliable and fast simulator for wireless networks, ad hoc networks, and generally, for low connection reliability networks.