A. van Staveren

The design of low-noise bandgap references

The noise power of bandgap references is directly related to the current consumption of the bandgap reference. This paper describes the design of low-noise bandgap references. It is shown that for an idealized bandgap reference, a fundamental noise limit exists when the limited current consumption is a constraint. A design example is given of a 1 V bipolar bandgap reference with a current consumption of 5 /spl mu/A. The output voltage is 200 mV and the mean temperature dependency is /spl ap/20 ppm/K for 0/spl deg/C to 100/spl deg/C. The output noise density equals 166 nV//spl radic/Hz.

Dynamic behavior of dynamic translinear circuits: the linear time-varying approximation

Dynamic translinear circuits explore the exponential relation of transistors as a primitive for the synthesis of electronic circuits. In this letter, the linear time-varying approximation is applied to describe the dynamic behavior of a second-order dynamic-translinear oscillator. The Floquet exponents are calculated by the dynamic eigenvalues introduced earlier.

An integratable second-order compensated bandgap reference for 1V supply

A new systematic approach is used for the design of bandgap references. A linear combination of two base-emitter voltages is taken to compensate implicitly for the temperature behavior of these base-emitter voltages. To reach optimum circuit performance with respect to accuracy and power, systematic design procedures are used. The realized bandgap reference circuit is completely integratable and operates from a supply voltage of only 1V. The output voltage is approximately 194 mV and has an average temperature dependency of 1.5ppm/°C in the range of 0°C to 100°C. The circuit has been realized in a bipolar process withft ⩾ 5 GHz. The total amount of capacitance is approximately 150 pF and the current consumption is about 100µA.

Systematic biasing of negative feedback amplifiers

A biasing method is described intended to make automated biasing of at least some classes of analog circuits straightforward. It has been tested for linear amplifiers, though it is not restricted to that class. A systematic way to introduce bias sources in a circuit is discussed. Also methods for reducing the number of bias sources and bias feedback loops are given. Application of the method has shown that at least for the class of amplifiers the theory is well suited for automation.

Modelling differential pairs for low-distortion amplifier design

The differential pair is one of the basic amplifying stages in amplifier design. Aiming at the the design of low-distortion amplifiers, a simple model for a differential pair is derived using the Volterra series. The parameters in this model correspond to the well-known small-signal parameters, furthermore the effect of the non-ideal tail-current source is made explicit in the model. The model gives insight in the way distortion is generated in a differential pair and it therefore allows the establishment of some simple design rules. Although being derived from a very simple model, the expressions give a good accordance with simulations.

A low-noise bandgap reference voltage source with curvature correction

The design of a curvature-corrected bandgap reference using a linear combination of two base-emitter voltages with only one scaling factor is treated. Systematic design approaches are followed to obtain optimum performance with regard to noise, accuracy and power consumption. Further, the effect of the temperature dependency of the resistors on the performance of the bandgap reference is investigated. From simulation, using the parameters of the DIMES03 process, the output voltage is approximately 225 mV with an average temperature dependency of 3 ppm//spl deg/C in the range of 0/spl deg/C to 120/spl deg/C. Its total equivalent noise production at the output is approximately 20 nV//spl radic/Hz. The total current consumption is about 50 /spl mu/A from a 1.2 V supply.

Order determination for frequency compensation of negative-feedback systems

To maximize the bandwidth of dedicated negative feedback amplifiers by passive frequency compensation, the order of the amplifier needs to be known. Here a method is introduced to determine the order of a circuit with negative feedback. It is shown that the slim of poles in the negative feedback loop, i.e. the loop poles, can be used to determine the order of the amplifier. These loop poles, can be found relatively easily from the circuit diagram and thus the order of the circuit is also relatively easily found.

The linear time-varying approach applied to the design of a negative-feedback class-B output amplifier

The increasing number of battery-operated devices asks for more low-power electronic circuits. A major cause of current consumption are the bias currents. Thus designing circuits having no bias currents may lead to considerable reductions in the power consumption. This inherently implies that we have to deal with the nonlinear behavior of devices. Here the design of a low-voltage low-power negative-feedback amplifiers with a class-B output stage is described. The key issue in the design is the description of the dynamics of the amplifier by the linear time-varying approach. This uses a time-varying small-signal model of nonlinear circuits and enables a generalization of the traditional pole-zero concept. The designed amplifier is capable of driving 1 mA through a piezoelectric load (14 nF). The stand-by current varies from 40 /spl mu/A to 100 /spl mu/A.

Low-noise oscillators

Phase noise is an important issue in oscillator design. Several classes of oscillators exist each exhibiting its own typical noise behavior. Various techniques exist for optimizing the noise behavior, depending on the specific class. Methods vary from optimization of the oscillator itself to the coupling of a number of oscillators. Two important classes of oscillators are first-order oscillators and second-order oscillators. One of the most promising optimization strategies for first-order oscillators seems to be coupling large numbers of oscillators; however, technology is not quite ready for this. Optimization of second-order oscillators by coupling does not appear to be of great general use. In this case much improvement can be achieved with optimization of the oscillator itself.

Effectivity of standby-energy reduction techniques for deep sub-micron CMOS

Present and future transistor technologies suffer from increasing standby leakage. In this paper the effectivity of standby-energy reduction techniques will be expressed in terms of a minimum required standby time. Beyond this time the corresponding standby-energy reduction is profitable for the specific application. Techniques known from literature are evaluated in the context of GSM and UMTS applications. The Triple-S technique is shown to be able to double the standby time of a UMTS application.Present and future transistor technologies suffer from increasing standby leakage. In this paper the effectivity of standby-energy reduction techniques will be expressed in terms of a minimum required standby time. Beyond this time the corresponding standby-energy reduction is profitable for the specific application. Techniques known from literature are evaluated in the context of GSM and UMTS applications. The Triple-S technique is shown to be able to double the standby time of a UMTS application.