Aaron Albores-Mejia

Monolithic active-passive 16 × 16 optoelectronic switch

We present what is to our knowledge the first active-passive monolithically integrated 16×16 switch. The active InP/InGaAsP elements provide semiconductor optical amplifier gates in a multistage rearrangeably nonblocking switch design. Thirty-two representative connections, including the shortest, longest, and comprehensive range of intermediate paths have been assessed across the switch circuit. The 10 Gb/s signal routing is demonstrated with an optical signal-to-noise ratio up to 28.3 dB/0.1 nm and a signal extinction ratio exceeding 50 dB.

Monolithic Multistage Optoelectronic Switch Circuit Routing 160 Gb/s Line-Rate Data

We propose, characterise and demonstrate a photonic multistage switching circuit operating at 160 Gb/s serial line rates. The circuit is realised on a re-grown active-passive wafer exploiting multiple stages of loss-compensating semiconductor optical amplifier crossbar switch elements. Excellent 40 dB crosstalk extinction is achieved, with signal to noise ratios of up to 39 dB/0.06 nm. Low loss circuit operation is presented, with the prospect of gain if antireflection coatings are applied at the input and output facet.

Integrated optical switch matrices for packet data networks

Integrated circuit technologies are enabling intelligent, chip-based, optical packet switch matrices. Rapid real-time re-configurability at the photonic layer using integrated circuit technologies is expected to enable cost-effective, energy-efficient, and transparent data communications. InP integrated photonic circuits offer high-performance amplifiers, switches, modulators, detectors, and de/multiplexers in the same wafer-scale processes. The complexity of these circuits has been transformed as the process technologies have matured, enabling component counts to increase to many hundreds per chip. Active–passive monolithic integration has enabled switching matrices with up to 480 components, connecting 16 inputs to 16 outputs. Integrated switching matrices route data streams of hundreds of gigabits per second. Multi-path and packet time-scale switching have been demonstrated in the laboratory to route between multiple fibre connections. Wavelength-granularity routing and monitoring is realised inside the chip. In this paper, we review the current status in InP integrated photonics for optical switch matrices, paying particular attention to the additional on-chip functions that become feasible with active component integration. We highlight the opportunities for introducing intelligence at the physical layer and explore the requirements and opportunities for cost-effective, scalable switching.

InP monolithically integrated wavelength selector based on periodic optical filter and optical switch chain

We present an InP monolithically integrated wavelength selector that requires log2N switches for selecting N modulated wavelengths. Nanosecond operation and error-free wavelength selection of four modulated wavelengths with 2 dB of power penalty is demonstrated.

Scalable InP integrated wavelength selector based on binary search

We present an InP monolithically integrated wavelength selector that implements a binary search for selecting one from N modulated wavelengths. The InP chip requires only log(2)N optical filters and log(2)N optical switches. Experimental results show nanosecond reconfiguration and error-free wavelength selection of four modulated wavelengths with 2 dB of power penalty.

Clock-distribution with instantaneous synchronization for 160 Gbit/s optical time-domain multiplexed systems packet transmission.

We demonstrate for the first time, to our knowledge, a clock-distribution method for ultra-high-speed optical time-domain multiplexed systems data packets that provides instantaneous synchronization, fast locking/unlocking times, and a highly stable bursty clock, enabling error-free operation of 160 to 10 Gbit/s time demultiplexing with a power penalty of 1.5 dB after 51 km transmission in standard single-mode fiber (ITU G.652).

Low power penalty monolithically-cascaded 1550nm-wavelength quantum-dot crossbar switches

A compact cascaded crossbar element with low power penalty, high distortion threshold and low crosstalk penalty is presented. Dual-stage monolithic switch integration is facilitated using a quantum dot epitaxy at 1550nm wavelength.

160Gb/s Serial Line Rates in a Monolithic Optoelectronic Multistage Interconnection Network

We demonstrate very high line rate serial 160Gb/s data transmission through a semiconductor optical amplifier based multistage switching matrix. This represents both the leading edge in monolithic switching circuit complexity and the highest reported line rates through monolithically cascaded switching networks. Bit error rate studies are performed to show only modest levels of signal degradation. Power penalties of order 0.6dB and 1.2dB are observed for two stages and four stages respectively in the monolithic circuits at 160Gb/s per path.

Scalable quantum dot based optical interconnects

Scalable quantum dot based optical switches offer energy-efficient low-latency data routing. Low power penalty routing over multiple stages are feasible with with the prospect of larger scale photonic integration.

Study of the dynamics of the nonlinear polarization rotation in a semiconductor optical amplifier

To characterize and predict the dynamics of the nonlinear polarization rotation (NPR) in semiconductor optical amplifiers (SOA) an experimental method based on the frequency response technique and a model based on the density matrix and effective index formalisms are presented. Particularly, the frequency response of the NPR is obtained by determining, for each studied frequency, the angular displacement, at the Poincare Sphere, that separates the initial and final points of the polarization evolution of the output beam.