Ka Kevin Williams

A simple device to allow enhanced bandwidths at 850 nm in multimode fibre links for gigabit LANs

Summary form only given. There is currently much interest in gigabit/s datacommunication links for computer LANs. However, due to the low modal bandwidth of installed multimode fibre (MMF), the achievable link lengths are limited. At an operating wavelength of 1300 nm, greater link lengths can be achieved with mode conditioning patch cords which generate an offset launch into the MMF. However, at the alternative operating wavelength of 850 nm, there is currently no equivalent low cost commercial method available that allows restricted mode launch to be achieved. Therefore, there is considerable interest in developing techniques for generating conditioned launch in MMF which can be implemented in a cost-effective manner. A device has been previously reported that used focused ion beam etching to suppress the emission at the centre of the output aperture. However, this technique requires additional processing steps and results in non planar devices. This paper therefore demonstrates a simpler approach for enhancing the performance of these links.

An introduction to InP-based generic integration technology

Photonic integrated circuits (PICs) are considered as the way to make photonic systems or subsystems cheap and ubiquitous. PICs still are several orders of magnitude more expensive than their microelectronic counterparts, which has restricted their application to a few niche markets. Recently, a novel approach in photonic integration is emerging which will reduce the R&D and prototyping costs and the throughput time of PICs by more than an order of magnitude. It will bring the application of PICs that integrate complex and advanced photonic functionality on a single chip within reach for a large number of small and larger companies and initiate a breakthrough in the application of Photonic ICs. The paper explains the concept of generic photonic integration technology using the technology developed by the COBRA research institute of TU Eindhoven as an example, and it describes the current status and prospects of generic InP-based integration technology.

Monolithic active-passive 16 × 16 optoelectronic switch

We present what is to our knowledge the first active-passive monolithically integrated 16×16 switch. The active InP/InGaAsP elements provide semiconductor optical amplifier gates in a multistage rearrangeably nonblocking switch design. Thirty-two representative connections, including the shortest, longest, and comprehensive range of intermediate paths have been assessed across the switch circuit. The 10 Gb/s signal routing is demonstrated with an optical signal-to-noise ratio up to 28.3 dB/0.1 nm and a signal extinction ratio exceeding 50 dB.

Monolithically Integrated InP 1

The static and dynamic characteristics of a monolithically integrated InP 1 × 16 optical phased-array switch are presented. The device demonstrates static switching with an average extinction ratio of 18.6 dB, on-chip loss below 7 dB, and wavelength dependence of less than 0.8 dB in the entire C-band. A 40-Gb/s nonreturn-to-zero signal is transmitted through the switch with a power penalty below 0.4 dB. Using a programmable electronic circuit, dynamic switching to all 16 outputs is achieved with response times less than 11 ns.

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The scaling of the capacity of a semiconductor- optical-amplifier-based switch carrying wavelength-striped data is assessed under packet timescale reconfiguration for short- reach high-capacity data interconnects. Off-the-shelf components are used with a low-complexity control layer to demonstrate high-capacity end-to-end packet routing. The impact of increasing the aggregate data rate and the number of connections made to the switch fabric is assessed in terms of the power penalty and dynamic range for a broadcast and select architecture. Studies with up to ten wavelength-multiplexed data channels with an aggregate capacity of 100 Gb/s are shown to give sufficient margin for even higher aggregate data rates and for the additional splitter stages, which would enable 8times8 connectivity in a single stage. Further increases in connectivity are anticipated with higher performance commercially available transmitters and receivers. Multipath routing is assessed with three hosts simultaneously transmitting wavelength-striped data packets over the same switch fabric to reveal a penalty in the range of 0.3-0.6 dB due to multi- path crosstalk and a modest penalty in the range of 0.4-1.2 dB that was incurred through dynamic routing. A route to terabit-per- second switch performance in a single-stage low-complexity switch fabric is identified.

16 Optical Switch With Wavelength-Insensitive Operation

A scalable photonic interconnection network architecture is proposed whereby a Clos network is populated with broadcast-and-select stages. This enables the efficient exploitation of an emerging class of photonic integrated switch fabric. A low distortion space switch technology based on recently demonstrated quantum-dot semiconductor optical amplifier technology, which can be operated uncooled, is used as the base switch element. The viability of these switches in cascaded networks is reviewed, and predictions are made through detailed physical layer simulation to explore the potential for larger-scale network connectivity. Optical signal degradation is estimated as a function of data capacity and network size. Power efficiency and physical layer complexity are addressed for high end-to-end bandwidth, nanosecond-reconfigurable switch fabrics, to highlight the potential for scaling to several tens of connections. The proposed architecture is envisaged to facilitate high-capacity, low-latency switching suited to computing systems, backplanes, and data networks. Broadband operation through wavelength division multiplexing is studied to identify practical interconnection networks scalable to 100 Gbits/s per path and a power consumption of the order of 20 mW/(Gbits/s) for a 64×64 size interconnection network.

Capacity Scaling in a Multihost Wavelength-Striped SOA-Based Switch Fabric

The first monolithically integrated InGaAsP/InP active-passive 8 × 8 cross-connect is designed, fabricated and demonstrated. The selection functionalities in the space and wavelength domain are implemented simultaneously on a single chip. Eight broadband inputs connect to an array of 1 × 8 broadband space selection switches. Wavelength domain selection is subsequently performed with an array of eight 8 × 8 gated cyclic routers. The on-chip fan-outs and fan-ins allow the integration of 136 semiconductor optical amplifier gates and eight cyclic routers within a chip area of 14.6 × 6.7 mm2 . Circuit connectivity is evaluated for the full range of paths with optical and electronic connections for 84% of the paths in this first prototype. Good spectral uniformity for the cyclic routers and loss compensation from the semiconductor optical amplifier gates allow for operation across a broad spectral range. Data routing studies are performed for a representative range of paths to show optical signal to noise ratios of greater than 30 dB/0.1 nm. Dynamically reconfigurable routing is also demonstrated for four simultaneously routed wavelengths. Switch rise and fall times are measured to be 3.8 and 3.2 ns respectively.

Scalable optical switches for computing applications [Invited]

Optical buffering has been one of the major technical challenges in realizing optical packet switching (OPS) routers. While fiber-delay-line-based (FDL) buffers are the most practical and realistic solution to offer useful amount of capacity, the bulkiness of long FDLs and optical switches has been the main obstacle to practical implementation. This paper demonstrates a compact optical buffer with up to 750-ns capacity and 50-ns temporal resolution by using an InP integrated 1×16 optical phased-array switch and compact FDL module based on thin-cladding highly nonlinear fiber (HNLF). Owing to the high mode confinement inside HNLF, 15 fibers with the total length of 1.2 km are coiled onto a single bobbin with a coin-sized footprint without increasing the propagation loss. At the interface between the InP switch and FDLs, a pitch-converting silica planar-lightwave circuit chip is employed to achieve 16-port simultaneous uniform interconnection. Using the developed module, variable optical buffering experiment is demonstrated, where the packet intervals are expanded from 20 to 70 ns successfully.

Monolithically Integrated 8 × 8 Space and Wavelength Selective Cross-Connect

A low loss, broadband crosspoint switch matrix using high-order resonant optical switch elements is designed, and fabricated for the first time. Multi-path routing is demonstrated for a broad range of representative paths across the circuit. Connections are assessed between eight inputs and four outputs to show losses as low as 0.9 dB per off state ring and 2.0 dB per on state ring. Analysis of the on-state and off-state transfer functions reveal switch extinction ratios exceeding 20 dB for operational bandwidths of 100 GHz for twenty-five different path combinations. Switching is implemented with thermo-optic tuning to give 100-GHz passbands and stopbands. Thermo-optic actuation with a 2-D array of on-chip microheaters allows rise and fall switching times of 17 and 4 microseconds respectively. Power penalties of less than 1.0 dB at 10 Gb/s are observed for twenty eight paths and comparable performance is observed for 40 Gb/s routing on representative paths through the switch matrix without significant signal degradation.

Large-Capacity Compact Optical Buffer Based on InP Integrated Phased-Array Switch and Coiled Fiber Delay Lines

We propose, characterise and demonstrate a photonic multistage switching circuit operating at 160 Gb/s serial line rates. The circuit is realised on a re-grown active-passive wafer exploiting multiple stages of loss-compensating semiconductor optical amplifier crossbar switch elements. Excellent 40 dB crosstalk extinction is achieved, with signal to noise ratios of up to 39 dB/0.06 nm. Low loss circuit operation is presented, with the prospect of gain if antireflection coatings are applied at the input and output facet.