Adam J. Williams

92–96 GHz GaN power amplifiers

We report the test results of a family of 92-96 GHz GaN power amplifiers (PA) with increasing gate peripheries (150 µm to 1200 µm). The 1200 µm, 3-stage PA produces 2.138 W output power (Pout) with an associated PAE of 19% at 93.5 GHz (VD=14V). The amplifier offers Pout over 1.5W with associated PAE over 17.8% in the 92–96 GHz bandwidth. The measured data show that the maximum Pout scales linearly with increasing gate periphery at an almost constant PAE around 20%. This demonstrates the high efficiency of on-chip power combining and enables W-band high power single chip solid state power amplifiers.

W-band power performance of AlGaN/GaN DHFETs with regrown n+ GaN ohmic contacts by MBE

We report our second-generation mm-wave GaN double-heterostructure FET (DHFET) device technology which uses MBE regrowth of n+ ohmic regions to reduce parasitic resistance, and an improved T-gate process which demonstrated reduced current-collapse. These devices were utilized in a MMIC with a 600 µm wide output stage which achieved 1024 mW of output power (1.7 W/mm) and PAE of 19.1% at 95 GHz at a bias of 14V. This combination of power and PAE represents a substantial improvement over competing technologies, such as InP HEMTs, as well as our own previous reports of GaN MMIC amplifiers in this frequency range.

Monolithic Integration of Enhancement- and Depletion-Mode AlN/GaN/AlGaN DHFETs by Selective MBE Regrowth

We have achieved the monolithic integration of two Ill-nitride device structures through the use of etching and re growth by molecular beam epitaxy (MBE). Using this regrowth technique, we integrated enhancement-mode (E-mode) and depletion-mode (D-mode) AIN/GaN/AlGaN double-heterojunction field-effect transistors (DHFETs) on a single SiC substrate, wherein the E-mode devices had a 2-nm-thick AlN barrier layer and the D-mode devices had a 3.5-nm-thick AlN barrier layer. The direct-current and radio-frequency (RF) performance of the resulting DHFETs was equivalent to devices fabricated using our baseline process with a normal MBE growth. D-mode devices with a gate length of 150 nm had a threshold voltage Vth of -0.10 V, a peak transconductance gm value of 640 mS/mm, and current gain and power-gain cutoff frequencies fT and fmax of 82 and 210 GHz, respectively. E-mode devices on the same wafer with the same dimensions had a Vth value of +0.24 V, a peak gm value of 525 mS/mm, and fT and fmax values of 50 and 150 GHz, respectively. The application of this regrowth technique is not, in any way, limited to the integration of E- and D-mode devices, and this method greatly expands the design possibilities of RF and power switching circuits in the nitride material system.

Normally-Off GaN-on-Si transistors enabling nanosecond power switching at one kilowatt

Power switches based on GaN-on-Si transistor technology have the advantage of high switching speed and low fabrication cost. This paper reports our recent advancement in device technology which enabled nanosecond switching at one kilowatt, with an unprecedented slew rate of 325 V/ns. The high switching speed opens up pathways for emerging applications such as envelope tracking and wireless power charging.

Normally-off GaN-on-Si metal-insulator-semiconductor field-effect transistor with 600-V blocking capability at 200 °C

We report a GaN-on-Si metal-insulator-semiconductor field-effect transistor (MISFET) with normally-off operation and 600-V blocking capability at 200 °C temperature. The temperature-dependences of threshold voltage, on-resistance, and leakage characteristics are discussed.

Novel Asymmetric Slant Field Plate Technology for High-Speed Low-Dynamic R on E/D-mode GaN HEMTs

In this letter, we discuss a novel asymmetric field plate structure utilizing a slanted field plate (FP) engineered to appropriately distribute the electric field on GaN high-electron mobility transistors (HEMTs) scaled for low-loss, high-speed power switch applications. A uniform electric field distribution achieved with the slant FP enables an optimum device design, where a low-dynamic ON-resistance (Ron,dyn) and high breakdown voltage are obtained simultaneously by minimizing the gate-drain distance. The optimized FP design demonstrated a low Ron,dyn of 2.3 (2.1) Ω-mm at a quiescent drain voltage of 50V in E-mode (D-mode) HEMTs with a breakdown voltage of 138 V (146 V). The corresponding high-frequency performance of E-mode (D-mode) HEMTs of peak fT/fmax = 41/100 GHz (53/100 GHz) yielded a decent Ron,dyn×Qg product in the range of 31.0-34.5 (28.0-33.3) mQ-nC. This new slant FP technology combined with scaled epitaxial structure (for short Lg) and reduced access resistances, using n+ GaN ohmic contacts, greatly enhances performance and design flexibility of high-speed, low-loss, GaN power switch devices.

Improved performance in vertical GaN Schottky diode assisted by AlGaN tunneling barrier

In a vertical GaN Schottky barrier diode, the free electron concentration n in the 6-μm-thick drift layer was found to greatly impact the diode reverse leakage current, which increased from 2.1 × 10−7 A to 3.9 × 10−4 A as n increased from 7.5 × 1014 cm−3 to 6.3 × 1015 cm−3 at a reverse bias of 100 V. By capping the drift layer with an ultrathin 5-nm graded AlGaN layer, reverse leakage was reduced by more than three orders of magnitude with the same n in the drift layer. We attribute this to the increased Schottky barrier height with the AlGaN at the surface. Meanwhile, the polarization field within the graded AlGaN effectively shortened the depletion depth, which led to the formation of tunneling current at a relatively small forward bias. The turn-on voltage in the vertical Schottky diodes was reduced from 0.77 V to 0.67 V—an advantage in reducing conduction loss in power switching applications.

High-Speed, Enhancement-Mode GaN Power Switch With Regrown

We report a novel GaN heterojunction field-effect transistor device that incorporates vertically scaled epilayers, a nanoscale gate with integrated staircase-shaped field plates, and regrown ohmic contacts. This device technology has an unprecedented combination of high breakdown (176 V), low ON-resistance (1.2 Ωmm), enhancement-mode operation (VTH=+0.35 V), and excellent high-frequency performance (fT/fmax=50/120 GHz), which enables new applications as a high-frequency power switch or a microwave power amplifier. The gate design manages the electric field at the drain edge of the gate, which mitigates dynamic ON-resistance degradation.

{\rm n}+

Selective etching of gallium nitride (GaN) over aluminum gallium nitride (AlxGa1-xN) with inductively coupled plasma and reactive ion etching (RIE) was examined using only chlorine and oxygen gasses. Etch selectivity was heavily influenced by the amount of oxygen present during etching and was slightly influenced by RIE power. Surface roughness was also influenced heavily by the oxygen flow and RIE power which is important for local and across-wafer uniformity. Etch rates were intentionally minimized for use for highly controlled etching of very thin GaN and Al0.25Ga0.75N epitaxial layers. Maximum tested etch rates for GaN and Al0.25Ga0.75N were 200 and 15 A/min, respectively, and maximum selectivity between GaN and Al0.25Ga0.75N achieved was at least 68.5 to 1. Above a certain oxygen flow, the etch rate of both GaN and Al0.25Ga0.75N drop so drastically that it was impractical to obtain the etch rate and selectivity in a timely manner. Optimum selectivity was obtained with a low oxygen flow to inhibit Al0...

GaN Ohmic Contacts and Staircase Field Plates

The main driving force for High Operating Temperature (HOT) detectors is the strong need for low cost, compact IR imaging solution capable of supporting a wide range of military and civilian applications. In the HOT regime where imagers can be cooled with multi-stage thermoelectric coolers, the major portion of the cost is due to the die-level back-end process, from the chip hybridization to final packaging. We present here an approach to achieve significant cost reduction of MWIR imagers by monolithically integrating III-V devices directly on Silicon substrates for wafer-scale fabrication and packaging of focal plane arrays (FPAs). High quality InAs films can be grown on a blanket Silicon wafer by metal-organic chemical vapor deposition (MOCVD) in a low growth temperature regime that complies with the thermal budget of the Si-electronics. High Resolution Transmission Electron Microscopy reveals predominantly oriented, single-crystal-like InAs films, with Σ3(111) twin boundaries, which our band structure calculations predict to be electrically benign. More intriguingly, selective-area growth on SiO2-masked ROIC-like templates is demonstrated with single-crystal-like InAs film nucleation at small Si(001) openings, together with the suppression of unwanted deposition on the dielectric mask. High crystallinity lateral epitaxial overgrowth of the InAs islands and film coalescence is achieved, enabling the potential to fully cover the entire patterned substrate. MBE-grown MWIR devices (λcut-off = 4.1 μm) on blanket InAs/Si templates exhibit a dark current of 2x10-5 A/cm2 , a specific detectivity of 6x1011 Jones and a quantum efficiency (QE) above 60% at 100K. The QE remains constant at high temperatures (<200K) where the dark current approaches that of baseline single-crystal HOT devices grown on native substrates At 230K, it is 6x10-2 A/cm2, yielding a specific detectivity of 1010 Jones.