Adrian R. Hartman

Monolithic high voltage gated diode crosspoint array IC

A new gated diode crosspoint integrated circuit has been developed for telephone switching system applications. Central to the design of this high voltage device has been the extensive use of numerical modeling techniques. Two-dimensional simulation of the individual dielectrically isolated components that comprise the switch array has led to an improvement in their electrical parameters together with size reduction for each of their geometries. Additional calculations dealing with the routing of interconnect metalization about the perimeter of components has indicated how such runners may encroach upon these elements without degrading their performance so that higher density circuitry could be assembled onto a chip. The resulting IC therefore realizes substantial advances over its predecessors, including: increased scale of integration (9 vs. 4 crosspoint pairs), more compact design (2.1 vs, 3.6mm2per crosspoint pair), higher OFF state minimum blocking voltage (600 vs. 530 volts), and reduced ON state incremental resistance (10 vs. 18 ohms).

530V Integrated gated diode switch for telecommunications

The objective of this work is to develop a new solid state crosspoint switch for telecommunications circuits. The switch is fully integrated into 580V monolithic circuits with appropriate control circuitry. Integrated arrays, packaged in hermetic chip carriers, perform the high level line circuit switching functions previously realized with arrays of electro-mechanical crosspoints. The Gated Diode Switch (GDS) is a dielectrically isolated lateral P+πPN+diode with a diffused gate on the planar surface and an MOS gate (consisting of the isolation oxide and polycrystalline substrate) on the lower boundary. With the center gate structure it achieves 530V bilateral blocking, very low crosstalk, insensitivity to transients and full current break capability. Two switches, each 0.15mm2, can be connected in antiparallel to realize a bidirectional current capability of 120mA DC and 500mA surge. Electron and hole injection produces conductivity modulation in the π-type tub to realize an incremental on resistance of 18 ohms and a forward voltage of 1.7V at 30mA. The paper describes the properties of the GDS when it is maintaining the off state, turning on and breaking current. The paper also establishes the requirements this switch places on its integrated control circuit. Integrated arrays containing four pairs of bilateral crosspoint switches have been developed for the subscriber line interface circuits of a large digital electronic switching system, #5 ESS.

A junction isolation technology for integrating silicon controlled rectifiers in crosspoint switching circuits

An integrated circuit technology has been developed to fabricate a matrix array of 32 junction isolated Silicon Controlled Rectifiers (SCR) for telephone switching systems. Other integrated SCR arrays have employed the more complicated dielectric or air isolation technologies to eliminate parasitic substrate leakages. This leakage in junction isolated structures results from the collection of minority carriers by the substrate. Our technology employs a vertical pnpn structure similar to collector diffusion isolation (1) with a p-substrate, n+buried layer, p-epitaxy, wrap around n+isolation diffusion, implanted n-gate and diffused p+anode regions. Through the use of gold recombination centers for carrier lifetime reduction, the structure achieves substrate leakages of less than one part in 105. The SCRs also have adequately low leakages of typically 10 nA at 30V forward or reverse.

A high speed, low voltage silicon photodiode with buried isolation region

A new epitaxial silicon p π n photodiode that operates at biases as low as 4 V has been developed. The device has a heavily doped p⁺⁺isolation region between the p⁺substrate and the π epitaxial layer. Fast response and low leakage current result from the recombination and trapping of the minority carrier electrons in the substrate. Experimental results on such a n+π p⁺⁺p⁺device with 1.1 mm²photosensitive area show rise and fall characteristics of 3 to 4 ns at 4 V bias with 825 nm radiation. The dark current is typically 40 pA at room temperature.

A regional analytic model for current interruption in high voltage center gated bipolar switches

High voltage (500V) crosspoint arrays have been realized in dielectric isolation technology for telecommunications applications. The crosspoint elements can be lateral bipolar devices with center gates such as the gated diode switch. To explain the transient behavior of these devices during current interruption a semi-analytical model has been developed. In spite of the approximate nature of the model, its results agree favorably with the observed properties of the crosspoint, and perhaps more significantly it provides a more quantitative test of the basic understanding of the device operation.