Ahmad Khanifar

Enhancement of power amplifier efficiency through dynamic bias switching

Linear digital modulation techniques in modern communication systems generate carrier signals with relatively high peak-to-average ratio. For linear amplification of such a signal, power amplifier must be operated at excessive back off, thus sacrificing the overall amplifier efficiency. Dynamic bias switching (DBS) can be used to enhance the efficiency of PA and the means to combat the degradation of spectrum regrowth and in-band noise are discussed in this paper. DBS is achieved by partitioning the required supply rail into two or several levels. The supply voltage is switched between the steps, and is adjusted in tune with the signal envelope. This is accomplished by using a pass-transistor (gate) operated as a switch with very low channel resistance. This approach avoids the energy loss associated with continuous tracking (amplification) of the signal envelope reported in the literature.

Bias circuit topologies for minimization of RF amplifier memory effects

Memory effects in amplifiers can be described as the dependence of the output signal not only to the instantaneous input, but also to previous inputs. In a system where these effects exist, the linearity of the amplifier is degraded by the DC supply impedance, which is affected by changes in the instantaneous bandwidth of the input signal. The resulting nonlinearity is difficult to remove completely, even by the most sophisticated predistortion techniques. This paper describes a circuit technique that is readily applicable to RF amplifiers designed for wideband applications used with or without a lineariser. The memory effect reduction is achieved by placing transmission zeros in the bias network transfer function. Transmission zeros at the output of device are formed by utilizing the series resonance properties of decoupling capacitors. The frequency response is synthesized to lower and even out the impedance of the bias network over the resulting distortion bandwidth.

High efficiency feedforward power amplifier using a nonlinear error amplifier and offset alignment control

A high efficiency feedforward power amplifier (FFPA) is proposed that uses the Doherty configuration for the both the main amplifier (MA) and error amplifier (EA). Using a nonlinear EA is a deviation from the traditional FFPA. A loop control algorithm is proposed that offsets the alignment setting from the standard value to best utilize the power handling capability and linearity of the MA and EA. A system efficiency of 25% is achieved for a rated output power of 52.7 dBm, while exceeding the WCDMA specifications. Reducing the peak-to-average power ratio (PAPR) of the input signal to 8 dB and using offset control improves the ACLR performance to -62 dBc.

Error signal reuse in a feedforward amplifier

In this paper, the concept of frequency selective feedback is examined in the context of feedforward (FFWD) amplifier architecture. In a typical FFWD system, a time-delayed signal that represents the distortion products is injected in anti-phase at the main amplifier output, thus improving the overall intermodulation distortion (IMD) of the system. This signal may also be reused as a feedback signal for improving the uncorrected main amplifier performance. Main amplifier linearity improvement is important in terms of efficiency, size and cost, and can be achieved at a small price in terms of added complexity. This paper presents simulation and measured results that were obtained from a realized system. The practical limitations of this technique are also outlined.

Power Amplifier Linearisation Through Generation and Injection of Low-Frequency Second-Order Nonlinear Products

This paper reports on a novel linearisation technique that is applicable to high power amplifiers used with digitally modulated single- or multi-carrier signals. The analysis, simulations and measured results demonstrate that improvements in distortion (ACPR, ACLR and EVM) can be achieved with a relatively small increase in signal processing overhead and minimal hardware complexity. This paper presents the underlying concept by applying frequency-domain analysis to an amplifier modelled by a truncated power series. The technique has been successfully applied to EDGE and QPSK-modulated carrier signals, and both simulation and measured results are presented.