Ahmed M. Mostafa

Toward a Formalization of UML2.0 Metamodel using Z Specifications

The Unified Modeling Language (UML) has become a widely adopted standard in the software development industry. Unfortunately, the UML is a semi-formal language which lacks precisely defined constructs. Z language is a formal specification language. Formal languages are used to ensure that systems meet regulations and standards. This paper aims to reduce risks associated with software development and increase safety and reliability. This goal is achieved by formalizing the syntax of (a sub-set of the popular UML diagrams (Use Case diagram, Class diagram, and State Machine diagram) using Z specifications.

Harmonic Segment-Based Semi-Partitioning Scheduling on Multi-Core Real-Time Systems

Nowadays, the issue of scheduling multi-core real-time systems has become the focus of such research in industrial, biomedical, military, and other fields. As a consequence, a new semi-partitioning algorithm that uses a static Rate-Monotonic criterion to schedule real-time tasks on multi-core platforms is proposed. The improvement in the performance of real-time systems is achieved by exploitingthe fact that the utilization boundary of a task set increases to fully utilize the processors if the periods of tasks have harmonic nature among each other. Experimental results on randomly generated datasets and real-world datasets show that the proposed algorithm inevitably outperforms other competitive algorithms.

C24. Harmonic semi-partitioning scheduling algorithm for multi-core real-time systems

In this paper, a new semi-partitioning scheduling algorithm for muli-core real time system is proposed. The proposed algorithm is called Harmonic Semi-Partitioning and Task Splitting (HSPTS) which uses the Rate-Monotonic approach to address the problem of scheduling periodic tasks with implicit deadlines on multi-core systems. Two challenges have been addressed and resolved by the proposed algorithm, the first is to find the set of tasks which have harmonic relations with each other. While the second challenge is to assign and split the appropriate tasks among different processors without overrun. In this context, the overall utilization for multi-core systems will be improved and exceed the Liu&Laylands boundary for N tasks. To this extent, the suitable task pairs are assigned to processors using hyperbolic boundary. Experimental results show that the developed algorithm enhances not only the overall system utilization but also the number of processors needed to schedule multi-core real-time systems compared with other competitive algorithms.

C26. An Integrated Power-efficient Mapping and Routing Technique for Mesh-based Networks-on-Chip

As technology moves towards multi-core system-on-chips (SoCs), networks-on-chip (NoCs) are emerging as the scalable fabric for interconnecting the cores. One of the most trade-off aspects in the design of NoCs is the improvement of the network performance, in terms of throughput and latency, while minimizing power consumption. This paper proposes an integrated power-efficient mapping and routing technique for mesh-based Networks-on-Chip. This technique combines an oblivious, path-diverse, minimal routing algorithm with a mapping approach that achieves the lowest power consumption in terms of the communication traffic on the global interconnection links. The robustness and reliability of the proposed technique is verified in the context of four different video processing applications: MPEG4, VOPD, MWD, and PIP. The experimental results show that the proposed integrated technique significantly improves network performance and power consumption.