E. M. Saad

A Data Gathering Algorithm for a Mobile Sink in Large-Scale Sensor Networks

Sink mobility is one of the most comprehensive trends for information gathering in sensor networks. This way of information gathering has a prominent role in balancing the energy consumption among sensor networks, and culling the hotspots problem of sensor networks. In this paper, a well planned adaptive moving strategy for a mobile sink in large-scale, hierarchical sensor networks is presented. The mobile sink traverses the entire network uploading the sensed data from cluster heads in time driven scenarios. The mobile sink trajectory is planned such that all heads require no multi-hop relays to reach the mobile sink. The proposed system aims at extending the lifetime of the sensor network by achieving a high level of energy efficiency and fair balancing of energy consumption across all network heads. Furthermore, reducing the loss that data incur due to buffer overflow. Extensive simulations are conducted in order to validate the proposed strategy. The adopted data gathering scheme outperforms the static sink scheme and periphery scheme in terms of life time elongation, and scalability.

Energy-efficient task allocation techniques for asymmetric multiprocessor embedded systems

Asymmetric multiprocessor systems are considered power-efficient multiprocessor architectures. Furthermore, efficient task allocation (partitioning) can achieve more energy efficiency at these asymmetric multiprocessor platforms. This article addresses the problem of energy-aware static partitioning of periodic real-time tasks on asymmetric multiprocessor (multicore) embedded systems. The article formulates the problem according to the Dynamic Voltage and Frequency Scaling (DVFS) model supported by the platform and shows that it is an NP-hard problem. Then, the article outlines optimal reference partitioning techniques for each case of DVFS model with suitable assumptions. Finally, the article proposes modifications to the traditional bin-packing techniques and designs novel techniques taking into account the DVFS model supported by the platform. All algorithms and techniques are simulated and compared. The simulation shows promising results, where the proposed techniques reduced the energy consumption by 75% compared to traditional methods when DVFS is not supported and by 50% when per-core DVFS is supported by the platform.

Adaptive Energy-Aware Gathering Strategy for Wireless Sensor Networks

Energy hole problem is considered one of the most severe threats in wireless sensor networks. In this paper the idea of exploiting sink mobility for the purpose of culling the energy hole problem in hierarchical large-scale wireless sensor networks based on bees algorithm is presented. In the proposed scheme, a mobile sink equipped with a powerful transceiver and battery, traverses the entire field, and periodically gathers data from network cluster heads. The mobile sink follows an adaptive gathering strategy resilient to both connected and disconnected networks. The proposed gathering strategy geared to eliminate multihop relays required by all cluster heads to reach the mobile sink, balancing the traffic load across all network heads, meanwhile, reducing the loss that data may incur due to buffer overflow. Furthermore, enabling the mobile sink to navigate safely within cluttered and uncluttered fields augments the proposed gathering strategy. Extensive simulations are conducted in order to validate the effectiveness of the proposed strategy. The achieved results show an improvement in overall system performance compared to other mobility strategies.

Toward a Formalization of UML2.0 Metamodel using Z Specifications

The Unified Modeling Language (UML) has become a widely adopted standard in the software development industry. Unfortunately, the UML is a semi-formal language which lacks precisely defined constructs. Z language is a formal specification language. Formal languages are used to ensure that systems meet regulations and standards. This paper aims to reduce risks associated with software development and increase safety and reliability. This goal is achieved by formalizing the syntax of (a sub-set of the popular UML diagrams (Use Case diagram, Class diagram, and State Machine diagram) using Z specifications.

A multifeature speech/music discrimination system

This paper presents a new technique for the automatic classification of audio signals into either speech or music signals. The classification is based on the most efficient five features extracted from the input signal. The correct classification ratio is always better than that using previous algorithms.

Modified back propagation algorithm for learning artificial neural networks

Back Propagation is now the most widely used tool in tile field of artificial neural networks. Many attempts try to enhance this algorithm to get minimum mean square error, less training time and small number of epochs. This paper first reviews the disadvantages of the Back Propagation algorithm. Next, the new modified back propagation is explained. Finally, comparison between the two algorithms is made through many examples.

Selection and MRC Diversity for a DS/CDMA Mobile Radio System through Nakagami Fading Channel

Spatial diversity is an attractive technology for coping with the fadingchannels encountered in mobile communications.In this paper, the bit error rate (BER) is analyzed theoretically fordiversity reception with a RAKE receiver in aNakagami fading environment using either selection or maximal ratio combining.A coherent binary phase-shiftkeying (CBPSK) direct sequence code division multiple access (DS/CDMA) systemis considered. An arbitrary branchcorrelation is also considered for any diversity order in the case ofidentical fading severity on the branches.

Evaluation of QoS in UMTS backbone network using differentiated services

A distinguishing feature of the universal mobile telecommunications system (UMTS) is the support of different levels of quality of service (QoS) as required by subscribers and their applications. To provide QoS, the UMTS backbone network needs an efficient QoS mechanism to provide the demanded level of services on UMTS network. A model to investigate end-to-end quality of service (QoS) provisioning approaches for UMTS networks in a. DiffServ IP network environment is implemented. The effort was put on QoS classes mapping from DiffServ to UMTS, access control, buffering and scheduling optimization. The DiffServ code point was utilized in the E2E UMTS QoS provisioning to differentiate different types of traffic. We hybridized our work by applying resource reservation protocol (RSVP) in routers and hosts. The main advantages and drawbacks are discussed. We found that our proposed model (hybridized model (DiffServ/RSVP)) improves the end-to-end delay and end-to-end variation compared with DiffServ model only, and it is superior to DiffServ regarding to throughput, utilization and packet loss ratio. The overall work guarantees the E2E QoS parameters of each service class, especially for real-time applications and improved the bandwidth utilization. Simulation results show that DiffServ can be an effective candidate for UMTS backbone bearer service.

Parallel-shift register and binary multiplier using optical hardware components

An optical four-bit parallel-shift register that consists of four serially connected optical flip-flop memories is driven by common clock pulses. Each optical flip-flop consists of two coupled polarization switches that share an all-optical demultiplexer, which makes the optical flip-flops easily connected with each other to form a parallel-shift register. The optical flip-flops are controlled by clock pulses. The parallel-shift register and an optical parallel adder are used to demonstrate an all-optical binary multiplier and its optical control circuit. The concept is demonstrated at an operation speed of 10 MHz for registers and 1 MHz for a multiplier, which is limited by long laser cavities formed by the optical fiber.

High-Speed, Area-Efficient FPGA-Based Floating-Point Arithmetic Modules

In this paper, single-precision floating-point IEEE-754 standard Adder/Subtractor and Multiplier modules with high speed and area efficient are presented. These modules are designed, simulated, synthesized and optimized by using Mentor Graphics Tools, and they are implemented on an FPGA based system by using the Xilinx Tool (ISE). A comparison between the results of the proposed design and a previously reported one is provided. The effect of normalization unit at the single-precision floating-point multiplier and adder/Subtractor modules on the area, and speed is explained. An FIR filter is implemented on FPGA as an application example.