Ahmed N. Tantawy

A model for flexible high-performance communication subsystems

A function-based communication model that allows applications to request individually tailored services from the communication subsystem is presented. Based on service requirements and available resources, suitable protocol machines are configured to serve the application. This configuration is done using a proper combination of functional modules. The concept of layering is therefore abandoned for both flexibility and efficiency reasons. >

A design methodology for protocol processors

New communication protocols such as FCS (Fibre Channel Standard), and ATM (Asynchronous Transfer Mode), are the emerging gigabit network standards. The emergence of these gigabit speed networks has resulted in increased communication processing requirements. Numerous architectures have been developed (using transputers, multiple microprocessors, VLSI, or high performance host machine) to meet such processing requirements. In this paper, we classify those architectures and discuss their pros and cons. We also propose an architecture using homogeneous multi-processors in a single VLSI chip. Given the state-of-the-art in CAD (Computer Aided Design) systems and the wide acceptance of IEEE VHDL (VHSIC Hardware Description Language) as the industry standard, it is now possible to build VHDL macro libraries and use them in designing environment-specific VLSI protocol processors. Libraries of behavioral models, typically used in simulating modules and adapter cards, can also be re-utilized in order to make the design process shorter, simpler and more cost-effective. We call this approach CVDS (Communication VLSI Design System).

Analysis of TCP/IP for high performance parallel implementations

An analysis of potential parallelism in TCP/IP is presented for two purposes. First, it is used as a basis for an implementation on a multiprocessing platform. Second, it reveals the areas where protocol modifications and/or tuning would yield more efficient implementations on multiprocessors. The focus is on the analysis, and detailed dependence graphs among the atomic TCP/IP protocol functions are presented. No specific implementation design is shown, since this highly depends on the particular hardware chosen.<<ETX>>

On the Design of a Multigigabit IP Router

The emergence of gigabit speed networks hinges upon the existence of high performance internetworking units, such as IP routers. In this paper, we present an architecture and we discuss the implementation of a multigigabit IP router. For this implementation, two special purpose VLSI chips are required; the rest can be built using off-the-shelf components. IP header processing of received packets is handled by a specialized chip. Memory management, another well-known performance bottleneck, is simplified and efficiently implemented using special VLSI support. Searching for the next hop address in the routing table, which is the major contributor to the delay in traditional IP protocol implementations, is significantly reduced by using a special configuration of Content Addressable Memories (CAMs).

A scheme for high-performance LAN interconnection across public MAN's

The proliferation of local area networks (LANs) and the emergence of high-bandwidth public networks will create an environment in which it will become increasingly simple and attractive to communicate among different organizations across a common public networking infrastructure. The open bridging scheme proposed, which employs inherent features of forthcoming cell-based metropolitan area networks (MANs) in order to achieve efficient interenterprise communications is introduced. It uses enhanced remote LAN bridging techniques to ensure router-level functionality with bridge-level simplicity and performance. The practicality of open bridging is shown by describing how it can be incorporated in networks using current standard protocol stacks, such as open systems interconnnection (OSI) and transmission control protocol/internet protocol (TCP/IP). >

A high performance transparent bridge

The high performance transparent bridge (HPTB) is a multiport bridge interconnecting gigabit networks. The provision of specialized hardware support coupled with proper partitioning of bridging protocol entities makes it possible to process frames at very high rates. The HPTB architecture allows concurrent bridging of asynchronous, synchronous and isochronous traffic among heterogeneous networks. It supports both traditional networks, such as variable packet size local area networks (LANs), and cell-based net works, such as distributed queue dual bus (DQDB) and metropolitan area networks (MANs). This device is capable of interconnecting any combination of high speed LANs of rates up to 800 Mbps and/or MANs of rates up to 622 Mbps. >

An adaptive scheduling scheme for dynamic service time allocation on a shared resource

A scheduling scheme that allows a number of customers to share a common resource in an efficient and fair way is presented. Each customer is allowed to use the resource for an amount of time that does not exceed a certain limit, the limit being a function of the waiting time elapsed between the time of its last request and the time of access to the resource. After expiration of the service time allocated to a customer, if more service is still needed, the customer has to re-enter the request queue and issue a new service request. The scheme combines the advantages of both processor-sharing and first-come, first-served disciplines in a dynamic way. The applicability and the advantages of the scheme in both open and closed system environments are discussed.<<ETX>>

Towards a high speed MAN architecture

Many applications could be implemented if very high speed communications systems were available. Although high-bandwidth network infrastructures exist today, the end-to-end throughput of actual communications systems is far less than what the physical links can handle. An attempt is made to identify the bottlenecks in current network architectures, and a framework is outlined for the design of an architecture and protocol suite for high-speed metropolitan area networks (MANs). The status of MAN architectural design is examined, and the actual performance limitations that are due to current communications systems architectures are addressed.<<ETX>>

High performance networking and the modular communication machine (MCM) approach

The authors introduce an approach to designing high-performance communication systems, which includes the modular communication machine (MCM) concept. Despite the high bandwidth of optical links and the high throughput obtainable from a myriad of media access control techniques, the end users of current communication networks have hardly any better network capacity than before, because the bottleneck has moved to the soft parts of the systems. In the design of high-performance communication systems numerous architectural and implementation issues are encountered. After a brief discussion of these issues and some of the approaches currently proposed to tackle them, the MCM concept, which is based on a modular and generic structure, is presented.<<ETX>>

A mechanism for implementing preemptive priorities in DQDB subnetworks

The authors propose a mechanism for implementing priorities in an IEEE 802.6 (DQDB) subnetwork of a metropolitan area network. The mechanism allows the priorities to be preemptively multiplexed among each other, thus, always guaranteeing maximum bandwidth to the highest priority traffic whenever it is requested. The proposed mechanism responds fast in the presence of high priority traffic and it takes full effect within at most one round trip propagation delay. >