Akira Maeki

A UWB-IR Transmitter With Digitally Controlled Pulse Generator

A novel transmitter for ultra-wideband (UWB) impulse radio has been developed. The proposed architecture enables low-power operation, simple design, and accurate pulse-shape generation. The phase and amplitude of the pulse are controlled separately and digitally to generate a desired pulse shape. This digital control method also contributes to the low-power transmission and eliminates the need for a filter. The transmitter is fabricated using a 0.18-mum CMOS process. The core chip size is only 0.40 mm2. From experimental measurements, it was found that the generated signal satisfied the FCC spectrum mask, and the average power dissipation was only 29.7 mW at A 2.2-V supply voltage. Therefore, the developed UWB transmitter generates accurate pulses with low power consumption and simple design architecture

1-cc Computer: Cross-Layer Integration With UWB-IR Communication and Locationing

The first one-cc or one-cubic-centimeter computer (OCCC) that integrates a sensor, ultra-wideband impulse radio (UWB-IR) transmitter, computing engine, and battery is demonstrated. Cross-layer integration includes SPIKE control, which achieves a record low power communication of 3.4-nW/bps with reduced operating time. Miniaturization techniques, such as wafer-level chip-size packaging and flip-chip packaging, were used to shrink the module to a volume of 1 cc. The fabricated OCCC is shown to operate as designed, communicating at distances of 10 and 30 m and at transmission rates of 10.7 Mbps and 258 kbps, respectively. The life of a 150-mAh battery in an OCCC that operates once every five minutes is estimated to be longer than 10 years. The communication-location integration (CLI) technique, which achieves 22-cm location accuracy with only a 1.3% chip area overhead, is also proposed.

A CMOS UWB-IR Receiver Analog Front End with Intermittent Operation

A low power receiver analog front end (AFE) for ultra-wideband impulse radio (UWB-IR) was developed in 0.18 mum CMOS. All circuits of the receiver AFE operate intermittently with a sampling clock of an analog-digital converter (ADC). The sampling rate of the ADC is equal to pulse repetition frequency of the received signals. Power consumption of the receiver AFE is decreased 60% by intermittent operation without degrading of receiver sensitivity. As a result, the power consumption of the receiver AFE is 38 mW at 258 kbps data rate.

Rapid signal acquisition for low-rate carrier-based ultra-wideband impulse radio

In this paper, a rapid signal-acquisition method is proposed for carrier-based ultra-wideband impulse-radio systems in low-data-rate applications such as sensor networks. For low-data-rate ultra-wideband impulse radio systems, highly precise synchronization must be established over relatively long periods. In the proposed method, signal-acquisition times are reduced by assigning different blocks responsibility for synchronization with the pulse and with the spreading code. Furthermore, dividing up the symbols to produce a smaller unit for integration enables signal acquisition even when there is a realistic difference between the transmitter and receiver-local frequencies. Results of simulation indicate that, for a given Eb/N0, the proposed method reduces acquisition times from those required by the conventional method.

Intermittent Operation Control Scheme for Reducing Power Consumption of UWB-IR Receiver

A low power ultra-wideband impulse radio (UWB-IR) receiver was developed in 0.18-mum CMOS. All circuits of the receiver AFE operate intermittently with a sampling clock of an analog-digital converter (ADC). The sampling rate of the ADC is equal to the pulse repetition frequency of the received signals. Power consumption of the receiver AFE is reduced by 60% using a developed intermittent operation scheme without degrading of receiver sensitivity. As a result, the power consumption of the receiver AFE is 38 mW. The receiver has a data rate of 258 kb/s over a distance of 52 m and of 10.7 Mb/s over a distance of 14 m.

Intermittent Wireless Communication System for Low-Power Sensor Networks

An intermittent wireless communication system has been developed for low-power sensor networks that improves sensor network efficiency by promoting cooperative optimization among the hardware architecture, communication protocol, and multiple access scheme. The intermittent communication protocol together with hardware for intermittent function contributed to reduce power consumption and extended sensor-node battery lifetime. A multiple access scheme based on the R-ALOHA protocol is used for the wireless link; it works efficiently with the protocol and hardware. Due to its inter-layer optimization, the system has low power consumption regardless of the traffic load and is thus flexible enough to support a wide range of sensor network applications.

0.7-GHz-Bandwidth DS-UWB-IR System for Low-Power Wireless Communications

A direct-sequence ultra-wideband impulse radio (DSUWB-IR) system is developed for low-power wireless applications such as wireless sensor networks. This system adopts impulse radio characterized by a low duty cycle, and a direct-sequence 0.7-GHz bandwidth, which enables low-power operation and extremely precise positioning. Simulation results reveal that the system achieves a 250-kbps data rate for 30-mdistance wireless communications using realistic specifications. We also conduct an experiment that confirms the feasibility of our system.

1-GHz Input bandwidth 6-bit under-sampling A/D converter for UWB-IR receiver

A 1-GHz input bandwidth 6-bit analog-to-digital (A/D) converter is described. The A/D converter is designed for an ultra-wideband impulse radio (UWB-IR) receiver that needs to digitize an input signal with a higher frequency than the sampling frequency. With the proposed under-sampling technique, sampling is executed with low-current consumption by separating a sampling capacitor from an operational amplifier and accumulating the offset voltage of the amplifier in another capacitor. In addition, a low-power comparator is proposed, which reduces bias current dynamically corresponding to its input voltage level. The A/D converter is implemented in a 0.18-mum CMOS process technology, which achieves an effective number of bits of 4.9 for input signals with frequencies greater than 1 GHz at 32 M samples/s, and consumes 0.89 mA at a 1.8-V supply. The converter occupies a 0.18 mm2 area.

1-cc computer using UWB-IR for wireless sensor network

An ultra-small, high-data-rate, low-power 1-cc computer (OCCC) with an UWB-IR (ultra-wideband impulse-radio) transceiver was developed for a wireless sensor network. Thanks to bear-chip implementation and a flexible printed circuit board, the size of the computer is only 1 cm3. To achieve 10-Mbps data rate, a middle-class 32-bit microcontroller, which has both a bus interface and a USB 2.0 controller, was selected. Low-power techniques, such as transition of microcontroller status to standby mode by using an external real-time clock during wait times, power shutdown of halted circuits, and detailed control of UWB-IR transceiver status, are applied. The effect of these low-power techniques is verified by measuring the time history of current consumption of the OCCC. It was confirmed that the OCCC can provide wireless communication at a transmission rate of 258 kbps over a distance of 30 m.

A low-power fully-integrated SP10T-RF-switch-IC

A new architecture has been designed and demonstrated for a low-power SP10T-RF-Switch-IC using 0.18μm SOI-CMOS, implementing an RF-Switch, negative voltage generator, and MIPI in a chip. Clock frequency of the negative voltage generator is controlled to increase only in a switch transition and drop at other times in order to reduce power consumption. Results of an evaluation of a trial chip confirmed a 33% reduction in power consumption compared with conventional architecture while RF performance is maintained.