Akira Sasano

Characterization of instability in amorphous silicon thin‐film transistors

Instability mechanism of amorphous silicon‐silicon nitride thin‐film transistors (TFTs) is examined. By investigating double‐layer insulator TFTs, it is demonstrated that the instability is caused by an electrical charge stored at the interface between amorphous silicon and silicon nitride. The amount of stored charge at the interface (Q) does not depend on either drain voltage or drain current. Study on TFTs with several insulator thicknesses has shown that Q strongly depends on the band bending in the amorphous silicon that is related to the gate electric field (E) through the gate insulator. The Q‐E relationship is found to be a more general expression of the dependence of threshold voltage shift on gate voltage, and is incorporated into a formula suitable for examining the interface quality.

Analysis and design of a-Si TFT/LCD panels with a pixel model

The design of a-Si thin-film-transistor/liquid-crystal-display (TFT/LCD) panels using a pixel model which consists of an equivalent electrical circuit and includes parasitic capacitance and the actual structure of deposited layers is discussed. The models validity is first confirmed by comparing calculations with experimental results on a-Si TFT switching characteristics and TFT/LCD electrooptical characteristics. The gradual-channel approximation of an MOS transistor is applied to the static I-V characteristic of a-Si TFTs. This approximation is successfully used to obtain an analytical expression for pixel electrode voltage during the TFT turn-on time. The calculated dependence of the LCD panel transmittance on signal voltage is shown to reproduce the experimental results. On the basis of the analysis, a TFT-addressed 5-in.-diagonal liquid-crystal color TV has been developed which exhibits excellent display quality. >

A novel technology for a-Si TFT-LCD's with buried ITO electrode structure

A novel process technology for a-Si TFT-LCDs with the buried ITO electrode (BI) structure was developed and applied to 10-in-diagonal LCD panels. By employing the BI structure, an aperture ratio of 29% was achieved in high resolution panels with a pixel size of 192 /spl mu/ and the pixel defect density was reduced to about one third of the conventional structure. The defect reduction effect of the BI structure was also confirmed theoretically. The BI structure provides significant advantages for high-performance TFT-LCDs. >

Threshold Voltage Shift of Amorphous Silicon Thin-Film Transistors During Pulse Operation

The threshold voltage shift of amorphous silicon thin film transistors (TFTs) under pulse operation is discussed. The stress time, stress voltage, duty ratio and frequency dependence of the shift have been measured. A positive voltage stress causes a constant shift, when the frequency is in the range from DC to over 100 kHz. On the other hand, the shift under a negative pulse stress depends on its repetition frequency and its pulse width and can be described by an equivalent circuit model. Based on these data, a more reliable estimate of the long-term reliability of an amorphous silicon TFT panel has been realized.

Semitransparent silicide electrodes utilizing interaction between hydrogenated amorphous silicon and metals

Thin silicide layers are found to be formed through solid state reaction between hydrogenated amorphous silicon (a‐Si:H) and metals. The method of formation of the silicide layer is very simple: deposition of metal, annealing, and etching of the residual metal layer. The reaction kinetics and properties of this layer are described. The thickness of this silicide layer is estimated to be less than 100 A. Accordingly, it can be used as the semitransparent electrode in a‐Si:H photodiodes. This layer is more chemically stable than such conventional transparent semiconductive oxides as indium tin oxide (ITO). Photodiodes using this semitransparent electrode have as good optical and electrical characteristics as conventional a‐Si:H photodiodes using ITO.

A new a-Si TFT with Al/sub 2/O/sub 3//SiN double-layered gate insulator for 10.4-inch diagonal multicolor display

A novel a-Si TFT (thin film transistor) with an Al gate electrode and an Al/sub 2/O/sub 3//SiN double-layered gate insulator has been developed and successfully applied to a 10.4-in diagonal multicolor display panel. Al is a low resistivity metal and it is also possible to form Al/sub 2/O/sub 3/ by anodic oxidation. These features contribute greatly to decreasing the number of defects in the panel and are indispensable for manufacturing a large-size display. The Al, which is used as a gate electrode, can also be used as a gate bus-line metal. As a result, the gate bus-line resistance of the panel can be reduced to about 2 k Omega , which is quite effective for improving the image quality of the panel.<<ETX>>

Characterization of amorphous silicides formed through interaction between a-Si:H and metals

Abstract Interfacial reactions between a-Si:H and transition metals and the characteristics of formed layers are described. Deposition of such metals as Cr, Ni, Pt, and Mo, on top of amorphous silicon, annealing, and etching of the residual metals produces an interface layer, which is very thin, and semitransparent in the visible range. This layer is characterized to be a kind of “amorphous silicide” layer. Although the estimated thickness of this layer is as thin as 5 nm, this film is conductive enough to be applied to the transparent electrode of a-Si:H imaging devices. The activation energy of conductivity of this layer is measured to be 1.5meV.

Hydrogenated amorphous silicon pin diodes with high rectification ratio

Abstract We have developed hydrogenated amorphous silicon (a-Si:H) pin diodes with a rectification ratio of up to 10 orders of magnitude by optimizing their junction performance as rectifiers. It has been found that impurity control and careful elimination of parasitic effects are essential for improved device characteristics. The interaction between a-Si:H and Al causes deterioration of junction performance at relatively low temperatures.

Interaction of Hydrogenated Silicon Nitride Films with Indium Tin Oxide

The whitening mechanism of hydrogenated silicon nitride (SiNx:H) film deposited on indium tin oxide (ITO) film was investigated by means of optical emission spectroscopy (OES), scanning electron microscopy (SEM) and X-ray photoelectron spectrosscopy (XPS) analysis. The degree of whitening of the SiNx:H film on ITO depends on the deposition conditions of SiNx:H, i.e., the SiH4 flow rate and the substrate temperature. Reactive species such as SiHn, decomposed from SiH4 gas, preferentially caused the reduction of ITO. This was followed by formation of In metal and a Si-rich porous layer containing SiO2. An abnormal growth of SiNx:H films caused by these successive reactions led to the whitening.

Phosphorus diffusion effect on off-current of a-Si thin film transistors

Abstract The off-current of a hydrogenated amorphous silicon thin film transistor is found to be affected by phosphorus diffusion from the n-layer to the i-layer during the n-layer deposition. The phosphorus diffusion coefficient is estimated to be 1.6×10−15cm2/sec at 380°C, and its activation energy is estimated to be 1.6eV. Removal of this phosphorus diffused region in the i-layer is indispensable for obtaining a low off-current.