Network


Latest external collaboration on country level. Dive into details by clicking on the dots.

Hotspot


Dive into the research topics where Toshihisa Tsukada is active.

Publication


Featured researches published by Toshihisa Tsukada.


Journal of Applied Physics | 1974

GaAs–Ga1−xAlxAs buried‐heterostructure injection lasers

Toshihisa Tsukada

Buried‐heterostructure injection lasers which have the filamentary GaAs active regions completely surrounded by Ga1−xAlxAs are proposed and have been successfully fabricated by using two‐step liquid‐phase‐epitaxial techniques. The active regions of these lasers can be made extremely small and do not have dimensional unbalances encountered in conventional injection lasers. The threshold current has been reduced to a value as low as 15 mA by applying current‐confining geometry to this laser. A study of optical characteristics has revealed such improvements over ordinary lasers as Gaussian beam profile, fundamental mode (TE00) operation, mode reproducibility, and mode stability. Due to the superior thermal properties of these lasers cw operation was easily obtained.


international electron devices meeting | 1987

A flash-erase EEPROM cell with an asymmetric source and drain structure

Hitoshi Kume; Hideaki Yamamoto; Tetsuo Adachi; Takaaki Hagiwara; Kazuhiro Komori; Toshiaki Nishimoto; A. Koike; Satoshi Meguro; Tetsuya Hayashida; Toshihisa Tsukada

A flash-erase EEPROM cell which consists of a single floating gate transistor is described. The cell is based on self-aligned double polysilicon stacked gate structure without a select transistor. It is programmed and erased by hot electrons at the drain edge similar to a UV-EPROM, and by Fowler-Nordheim tunneling of electrons from the floating gate to the source, respectively. An asymmetry in source and drain regions is introduced to enable fast program/erase operation. In addition, an n+concentration in the source region is optimized to achieve reproducible erasure, which is indispensable to avoid over-erasing problem. The optimized cell enables an erasing time of less than one millisecond with 12. 5 V on the source, and a scatter of erased Vth is almost negligible. Endurance and data retention characteristics is also adequate for implementation in memory chips. The small cell area of 9.3µm2is accomplished in a 0.8µm technology.


Journal of Applied Physics | 1991

Characterization of instability in amorphous silicon thin‐film transistors

Yoshiyuki Kaneko; Akira Sasano; Toshihisa Tsukada

Instability mechanism of amorphous silicon‐silicon nitride thin‐film transistors (TFTs) is examined. By investigating double‐layer insulator TFTs, it is demonstrated that the instability is caused by an electrical charge stored at the interface between amorphous silicon and silicon nitride. The amount of stored charge at the interface (Q) does not depend on either drain voltage or drain current. Study on TFTs with several insulator thicknesses has shown that Q strongly depends on the band bending in the amorphous silicon that is related to the gate electric field (E) through the gate insulator. The Q‐E relationship is found to be a more general expression of the dependence of threshold voltage shift on gate voltage, and is incorporated into a formula suitable for examining the interface quality.


Applied Physics Letters | 1972

Very‐Low‐Current Operation of Mesa‐Stripe‐Geometry Double‐Heterostructure Injection Lasers

Toshihisa Tsukada; Hiroshi Nakashima; J. Umeda; Satoshi Nakamura; Naoki Chinone; R. Ito; Osamu Nakada

Mesa‐stripe‐geometry double‐heterostructure lasers which operate at low‐current level have been fabricated. Lasers of this geometry are made by etching the heterostructure layers, leaving a stripe region with a width ranging from 10 to 40 μm. The current‐spreading effect inherent in stripe‐geometry lasers is eliminated in this structure. As a result of the small active region and the low‐threshold current density, a significant reduction of total threshold current has been realized. The lowest‐threshold current is 50 mA in pulsed operation, and 75 mA in dc. The thermal resistance of the diode of this structure is nearly as low as that of the stripe‐geometry laser.


Applied Physics Letters | 1990

Amorphous silicon phototransistors

Yoshiyuki Kaneko; Norio Koike; Ken Tsutsui; Toshihisa Tsukada

An amorphous silicon field‐effect phototransistor is fabricated using a processing technology compatible with conventional amorphous silicon‐silicon nitride thin‐film transistors. The phototransistor has an offset structure between the source and gate electrodes, where light is absorbed to produce a photocurrent. In an electron accumulation mode, the photocurrent is greater than the dark current by three orders of magnitude. In addition, the phototransistor is found to have output characteristics showing good saturation. Typical photoconductive gain of this saturation current is 17.


Archive | 2000

Active-Matrix Liquid-Crystal Displays

Toshihisa Tsukada

The active-matrix liquid-crystal display (AMLCD) is a flat-panel display in which the display medium is liquid crystal and each picture element (pixel) is driven by such active devices as diodes or transistors. These active devices are arranged in rows and columns on a glass substrate to control each pixel, and hence the name of active matrix. Before the AMLCDs were introduced, liquid-crystal displays were operated on a basis of simple matrix or passive-matrix. Passive-matrix liquid-crystal displays feature flatness, lightweight, and low-power consumption. Due to these features, they have been first installed in such devices as wrist watches or calculators. Then, their application fields have expanded to pocket TVs, word processors, and factory automation machines. There was a constant demand for larger sizes and higher resolutions.


IEEE Transactions on Electron Devices | 1989

Analysis and design of a-Si TFT/LCD panels with a pixel model

Yoshiyuki Kaneko; Akira Sasano; Toshihisa Tsukada

The design of a-Si thin-film-transistor/liquid-crystal-display (TFT/LCD) panels using a pixel model which consists of an equivalent electrical circuit and includes parasitic capacitance and the actual structure of deposited layers is discussed. The models validity is first confirmed by comparing calculations with experimental results on a-Si TFT switching characteristics and TFT/LCD electrooptical characteristics. The gradual-channel approximation of an MOS transistor is applied to the static I-V characteristic of a-Si TFTs. This approximation is successfully used to obtain an analytical expression for pixel electrode voltage during the TFT turn-on time. The calculated dependence of the LCD panel transmittance on signal voltage is shown to reproduce the experimental results. On the basis of the analysis, a TFT-addressed 5-in.-diagonal liquid-crystal color TV has been developed which exhibits excellent display quality. >


Japanese Journal of Applied Physics | 1991

Threshold Voltage Shift of Amorphous Silicon Thin-Film Transistors During Pulse Operation

Ryoji Oritsuki; Toshikazu Horii; Akira Sasano; Ken Tsutsui; Toshiko Koizumi; Yoshiyuki Kaneko; Toshihisa Tsukada

The threshold voltage shift of amorphous silicon thin film transistors (TFTs) under pulse operation is discussed. The stress time, stress voltage, duty ratio and frequency dependence of the shift have been measured. A positive voltage stress causes a constant shift, when the frequency is in the range from DC to over 100 kHz. On the other hand, the shift under a negative pulse stress depends on its repetition frequency and its pulse width and can be described by an equivalent circuit model. Based on these data, a more reliable estimate of the long-term reliability of an amorphous silicon TFT panel has been realized.


Journal of Non-crystalline Solids | 1992

Back-bias effect on the current-voltage characteristics of amorphous silicon thin-film transistors

Yoshiyuki Kaneko; Ken Tsutsui; Toshihisa Tsukada

Abstract The electrical potential of the back-surface of amorphous silicon thin-film transistors is controlled by a back bias, Vbb, applied to the back-gate electrode of a dual-gate structure. The threshold voltage of the transistor moves in the negative direction when Vbb is positive; this movement is similar to the substrate-bias effect of conventional metal-oxide-semiconductor transistors. The type of majority carriers of the off-current is determined by the polarity of the Vbb: electrons for Vbb > 0 V and holes for Vbb


Applied Physics Letters | 1984

Semitransparent silicide electrodes utilizing interaction between hydrogenated amorphous silicon and metals

Kouichi Seki; Hideaki Yamamoto; Akira Sasano; Toshihisa Tsukada

Thin silicide layers are found to be formed through solid state reaction between hydrogenated amorphous silicon (a‐Si:H) and metals. The method of formation of the silicide layer is very simple: deposition of metal, annealing, and etching of the residual metal layer. The reaction kinetics and properties of this layer are described. The thickness of this silicide layer is estimated to be less than 100 A. Accordingly, it can be used as the semitransparent electrode in a‐Si:H photodiodes. This layer is more chemically stable than such conventional transparent semiconductive oxides as indium tin oxide (ITO). Photodiodes using this semitransparent electrode have as good optical and electrical characteristics as conventional a‐Si:H photodiodes using ITO.

Collaboration


Dive into the Toshihisa Tsukada's collaboration.

Top Co-Authors

Avatar
Top Co-Authors

Avatar
Top Co-Authors

Avatar
Top Co-Authors

Avatar
Researchain Logo
Decentralizing Knowledge