Akitsu Shigetou

Room-temperature direct bonding of CMP-Cu film for bumpless interconnection

As the trend of microelectronic systems moves toward higher performance and speed, ultra-high density interconnection technology must be developed. To satisfy this requirement, a new concept called bumpless interconnection for next generation of packaging is proposed, which might bridge to global interconnection on chip. This technology will be most suitable and inevitable for ultra-high density interconnection when pad and pitch sizes are reduced to a few micrometers. Also the combination of a thin chip and a flexible substrate will be required for such interconnection since pads in the size of micrometers can not cope with the thermal stress in the bonding process. The surface activated bonding (SAB) method enables direct bonding at room-temperature. Thereby the SAB method is considered to be a most appropriate method for bumpless interconnection. Another requirement for bumpless interconnection is the bonding between Cu thin films because Cu is the most promising conductive material. Since SAB method requires no heat, large initial contact area must be maintained to obtain enough interconnection, For the purpose, the surface of Cu thin film must be highly flattened, for example, by Cu process. In this paper, a few fundamental experiments and preliminary results of investigations on the feasibility of CMP-Cu direct bonding at room temperature for bumpless interconnection are presented.

Bumpless interconnect of Cu electrodes in millions-pins level

In this study, we demonstrated the bumpless interconnect of Cu electrodes in millions-pins level in the wafer-scale by means of the surface activated bonding (SAB) method. The bumpless interconnect is a highly effective way to compensate the thermal expansion mismatch to obtain the bonding pitch of microns where ultra-low profiled Cu electrodes are bonded directly at low heating temperature to achieve high alignment accuracy and reliability. For the realization of wafer-scale interconnection, 12.5 million electrodes with the dimensions of 10times30mum2 and intervals of 10mum were fabricated on 8 and 6-inch wafers by the photolithography followed by the CMP (chemical mechanical polishing) process. In order to clarify appropriate SAB conditions for CMP-Cu to ensure both the cleanness and flatness of the surface to obtain an excellent quality of bonding, we modified the surface cleaning and vacuum conditions. The bonding experiments were performed with the SAB wafer bonder that enables the alignment accuracy of microns all over the wafer in the vacuum condition, and all electrodes were successfully interconnected with the contact load of around 2.0times10-4N/pin. The misalignment turned out as low as 2mum in the entire wafer, and the shear strength could be larger than 70MPa

Electrical Performance and Reliablity of Fine-Pitch Cu Bumpless Interconnect

In this study, we demonstrated the high electrical performances of the micron-level interface obtained by the Cu bumpless interconnect. Moreover, the bumpless structure was applied to the interconnection between the actual flash memory chip and the interposer. The bumpless interconnect has been proposed to solve the thermal strain problem by the direct bonding of Cu wiring without bump-like electrodes so as to enhance the potential of interconnection density. We achieved the direct interconnection of 100,000 Cu bumpless electrodes in the diameter of 3 mum and the pitch of 10 mum by means of the surface activated bonding (SAB) method, and then estimated that the contact resistance could be as low as the range of muOmega. The increment of the contact resistance was less than 5 % with a stable interface after heated at 150 degC for 1000 hours. Moreover, a fabrication process of the Cu bumpless structure with a polyimide insulation layer was developed and then we structured a 0.1-mm-thick compact flash (CF) memory chip interconnected to a interposer chip with the same thickness through the bumpless electrodes with the dimensions of 25times25 mum 2 and the pitch of 40 mum. The entire memory region was secured in the assembled flash memory chip after the formatting test of over 200 times, showing no obvious degradation after heated at 125 degC for 500 hours

Feasibility of SAB using Nano-adhesion Layer for Low Temperature GaN Wafer Bonding

GaN wafer bonding has been developed using conventional fusion techniques at high temperature. However, the future integration of complex 3D or photonic devices, a low temperature bonding technique, should be developed. Using the surface activated bonding (SAB) method, we demonstrated that surface activation by Ar fast atom beam irradiation is effective for room temperature bonding of GaN to Al, Si, and GaN. Because Ar atom irradiation of the GaN surface induces a modified layer revealing a Ga-Ga bond over an approximately 0.6 nm thickness, and an exposure of the surface to residual gases longer than 1.7xl0-4 Pa s leads to re-oxidation of the activated surface which results in a drastic decrease of the bond strength, it is concluded that a nano-layer enriched by Ga on the GaN surface may contribute to the formation of direct GaN wafer bonding at room temperature.

Effect of SAB process on GaN surfaces for low temperature bonding

In evaluating the energy for local elastic deformation in contact field, the surface roughness of GaN of 3 nm which was required for SAB was realized even after surface activation process, and even an improvement in the roughness was obtained by Ar-FAB irradiation of 0 degree incident angle. Moreover, to ease the damage to the composition of the surface when the GaN surface was activated, it was understood that Ar-FAB is effective. Bonding of GaN to Al was carried out at room temperature by the SAB method. As a result, GaN and bulk Al were successfully bonded with high bonding strength of 14.3 MPa.