Albert Chin

N-type Schottky barrier source/drain MOSFET using ytterbium silicide

Ytterbium silicide, for the first time, was used to form the Schottky barrier source/drain (S/D) of N-channel MOSFETs. The device fabrication was performed at low temperature, which is highly preferred in the establishment of Schottky barrier S/D transistor (SSDT) technology, including the HfO/sub 2/ gate dielectric, and HaN/TaN metal gate. The YbSi/sub 2 - x/ silicided N-SSDT has demonstrated a very promising characteristic with a recorded high I/sub on//l/sub off/ ratio of /spl sim/10/sup 7/ and a steep subthreshold slope of 75 mV/dec, which is attributed to the lower electron barrier height and better film morphology of the YbSi/sub 2 - x//Si contact compared with other self-aligned rare earth metal-(Erbium, Terbium, Dysprosium) silicided Schottky junctions.

Electrical characteristics of high quality La 2 O 3 gate dielectric with equivalent oxide thickness of 5 /spl Aring/

Electrical and reliability properties of ultrathin La/sub 2/O/sub 3/ gate dielectric have been investigated. The measured capacitance of 33 /spl Aring/ La/sub 2/O/sub 3/ gate dielectric is 7.2 /spl mu/F/cm/sup 2/ that gives an effective K value of 27 and an equivalent oxide thickness of 4.8 /spl Aring/. Good dielectric integrity is evidenced from the low leakage current density of 0.06 A/cm/sup 2/ at -1 V, high effective breakdown field of 13.5 MV/cm, low interface-trap density of 3/spl times/10/sup 10/ eV/sup -1//cm/sup 2/, and excellent reliability with more than 10 years lifetime even at 2 V bias. In addition to high K, these dielectric properties are very close to conventional thermal SiO/sub 2/.

High-density MIM capacitors using Al 2 O 3 and AlTiO x dielectrics

We have investigated the electrical characteristics of Al/sub 2/O/sub 3/ and AlTiO/sub x/ MIM capacitors from the IF (100 KHz) to RF (20 GHz) frequency range. Record high capacitance density of 0.5 and 1.0 /spl mu/F/cm/sup 2/ are obtained for Al/sub 2/O/sub 3/ and AlTiO/sub x/ MIM capacitors, respectively, and the fabrication process is compatible to existing VLSI backend integration. However, the AlTiO/sub x/ MIM capacitor has very large capacitance reduction at increasing frequencies. In contrast, good device integrity has been obtained for the Al/sub 2/O/sub 3/ MIM capacitor as evidenced from the small frequency dependence, low leakage current, good reliability, small temperature coefficient, and low loss tangent.

Effect of surface NH3 anneal on the physical and electrical properties of HfO2 films on Ge substrate

Metal-oxide-semiconductor capacitors were fabricated on germanium substrates by using metalorganic-chemical-vapor-deposited HfO2 as the dielectric and TaN as the metal gate electrode. It is demonstrated that a surface annealing step in NH3 ambient before the HfO2 deposition could result in significant improvement in both gate leakage current and the equivalent oxide thickness (EOT). It was possible to achieve a capacitor with an EOT of 10.5 A and a leakage current of 5.02×10−5 A/cm2 at 1 V gate bias. X-ray photoelectron spectroscopy analysis indicates the formation of GeON during surface NH3 anneal. The presence of Ge was also detected within the HfO2 films. This may be due to Ge diffusion at the high temperature (∼400 °C) used in the chemical-vapor deposition process.

A high-density MIM capacitor (13 fF/μm/sup 2/) using ALD HfO 2 dielectrics

Metal-insulator-metal (MIM) capacitors with different HfO/sub 2/ thickness have been investigated. The results show that both the capacitance density and voltage coefficients of capacitance (VCCs) increase with decreasing HfO/sub 2/ thickness. In addition, it is found that the VCCs decrease logarithmically with increasing thickness. Furthermore, the MIM capacitor with 10-nm HfO/sub 2/ shows a record high capacitance density of 13 fF//spl mu/m/sup 2/ and a VCC of 607 ppm/V, which can meet the requirement of the International Technology Roadmap for Semiconductors. It can also provide a low leakage current of 5.95 /spl times/ 10/sup -8/A/cm/sup 2/ at room temperature at 1 V, low tangent values below 0.05, and a small frequency dependence. These results indicate that the devices are suitable for use in silicon integrated circuit applications.

Alternative surface passivation on germanium for metal-oxide-semiconductor applications with high-k gate dielectric

An alternative surface passivation process for high-k Ge metal-oxide-semiconductor (MOS) device has been studied. The surface SiH4 annealing was implemented prior to HfO2 deposition. X-ray photoelectron spectroscopy analysis results show that the SiH4 surface passivation can greatly prevent the formation of unstable germanium oxide at the surface and suppress the Ge out-diffusion after the HfO2 deposition. The electrical measurement shows that an equivalent oxide thickness of 13.5A and a leakage current of 1.16×10−5A∕cm2 at 1V gate bias was achieved for TaN∕HfO2∕Ge MOS capacitors with the SiH4 surface treatment.

Low-power high-performance non-volatile memory on a flexible substrate with excellent endurance.

Plastic-substrate-based electronic devices are attractive because of their inherit merits of low cost, light weight, environmentally friendly low temperature processing, and the application in fl exible displays and integrated circuits (ICs). Fast progress of logic ICs using thin-fi lm transistors (TFT) on plastic has been demonstrated. However, one fundamental challenge for plastic electronics is the lack of good performance non-volatile memory (NVM) devices. [ 1–5 ] This is due to the degraded dielectric quality of charge-based fl ash (CTF) memory from the limited low temperature process. [ 2 ] Alternatively, the resistive random access memory (RRAM) [ 6–21 ] shows promising NVM performance on plastic even when processed at low temperature, but the large set and reset currents are the basic limitation for high-density and low-power operation. In addition, the large switching energies degrade the endurance due to excessive stress. In this paper, record high-performance NVM has been demonstrated on low cost polyimide substrate. A very low set current of 1.6 μ A at 3 V (4.8 μ W) and reset current of −0.5 nA at −2 V (1 nW) were needed to reach the bistable resistance state, which led to a large memory window with a highto low-resistance state ratio (HRS/LRS) of 9 × 10 2 . Additionally, good retention was obtained with a small HRS/LRS decay from the initial 9 × 10 2 to 7 × 10 2 at 85 ° C for 10 4 s. Furthermore, excellent endurance of 10 5 cycles was measured at a very fast 50 ns switching time. This is the lowest reported switching power NVM on plastic with excellent 10 5 cycling endurance and good retention. The excellent NVM performance on fl exible plastic is due to the using novel ultra-low power hopping conduction mechanism [ 22 ] rather than the conductive fi lament in conventional RRAM. [ 17 , 18 ] This new RRAM device sets a new standard for NVM performance on low-cost fl exible substrates.

Small-Subthreshold-Swing and Low-Voltage Flexible Organic Thin-Film Transistors Which Use HfLaO as the Gate Dielectric

Pentacene organic thin-film transistors (OTFTs) with a high-kappa HfLaO dielectric were integrated onto flexible polyimide substrates. The pentacene OTFTs exhibited good performance, such as a low subthreshold swing of 0.13 V/decade and a threshold voltage of -1.25 V. The field-effect mobility was 0.13 cm2/Vmiddots at an operating voltage as low as only 2.5 V. These characteristics are attractive for high-switching-speed and low-power applications.

A TaN-HfO/sub 2/-Ge pMOSFET with NovelSiH/sub 4/ surface passivation

In this letter, we demonstrate a novel surface passivation process for HfO/sub 2/ Ge pMOSFETs using SiH/sub 4/ surface annealing prior to HfO/sub 2/ deposition. By using SiH/sub 4/ passivation, a uniform amorphous interfacial layer is formed after device fabrication. Electrical results show that the HfO/sub 2/ Ge MOSFET with Si-passivation exhibits less frequency dispersion, narrower gate leakage current distribution, and a /spl sim/140% higher peak mobility than that of the device with surface nitridation.

Integrated antennas on Si, proton-implanted Si and Si-on-quartz

High performance antennas have been realized on proton-implanted Si with 10/sup 6/ /spl Omega/-cm resistivity. Sharp antenna resonance and low loss up to 20 GHz are observed indicating excellent antenna quality. In contrast, very poor antenna characteristics are found on conventional oxide-isolated Si because of the lossy substrate.