Alberto Gasperin

Impact of 24-GeV Proton Irradiation on 0.13-

We studied the response of a commercial 0.13-mum CMOS technology to high-energy (24-GeV) proton irradiation, which emulated the environment the front-end electronics of future high-energy accelerators will have to operate in, for fluences up to 1016 p/cm2 . After irradiation, large negative shifts in the threshold voltage and large drops in the maximum transconductance were observed in PMOSFETs, whereas comparatively smaller effects were present in NMOSFETs. Furthermore, both kinds of devices exhibited an increase in the drain off-current and in the gate leakage current. All the observed effects were roughly proportional to the proton fluence. For the PMOSFETs only, the amount of the degradation depended on the device channel length. The changes in the characteristics of the irradiated devices were attributed to the build-up of positive charge in the LDD spacer oxide and to the creation of defects in the gate oxide

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We present new results on heavy-ion irradiation of nanocrystal non-volatile addressable memory arrays. We show that the effects of a single ion hit are negligible on these devices due to the discrete nature of the storage sites. We estimate that, in order to observe an appreciable threshold voltage shift, at least three to four ion hits are needed. Despite several cells experiencing multiple hits they are still functional after the irradiation, showing no changes on the retention characteristics. These results highlight an outstanding improvement of the nanocrystal technology over the conventional floating gate memories in terms of radiation tolerance, which are encouraging for a potential application in radiation harsh environments.

m CMOS Devices

We investigate Total Ionizing Dose effects on 4 Mbit Phase Change Memories (PCM) arrays. We demonstrate a high robustness of PCM against ionizing radiation. We irradiated PCM with 8-MeV electrons. Only small variations are measured in the cell distributions after irradiation. The primary cause of these variations is the degradation of the Bit-Line and the Word-Line selector MOSFETs. Finally, radiation does not compromise the functionality of the SET and the RESET operations.

Radiation Tolerance of Nanocrystal-Based Flash Memory Arrays Against Heavy Ion Irradiation

Proton irradiation of nanocrystals memories produces peculiar radiation effects on the electrical characteristics of these devices, owing to their thin tunnel oxide and to the presence of nanocrystals replacing the conventional flash memory floating gate. In this work, we show that the data retention capability is compromised only after high fluences and that irradiated devices do not show accelerated degradation during subsequent electrical stresses. The presence of nanocrystals instead of a floating gate reduces also the quantity of charge lost during irradiation, indicating these devices as possible candidates for space and avionic environments

Total Ionizing Dose Effects on 4 Mbit Phase Change Memory Arrays

In this work we focused our attention on heavy ion irradiation effects on nanocrystal memory cell arrays. All cells are fabricated by depositing Si nanocrystal on top of a SiO2 layer. Immediately after irradiation we observed neither charge loss following the ion hit, nor appreciable change of the electrical characteristics of the nanocrystal MOSFETs, such as transconductance and drain current decrease. In addition, despite the gate oxide leakage current may show a large increase after irradiation with high energy ions, the data retention time of the cells is not compromised, due to the discrete nature of the nanocrystal storage node

Radiation-Induced Modifications of the Electrical Characteristics of Nanocrystal Memory Cells and Arrays

We investigate heavy ion irradiation effects on large area capacitors with an oxide-nitride-oxide (ONO) stack as dielectric. Despite the thickness of this stack (16.5 nm), we observe the onset of a leakage current after irradiation. We demonstrate that this leakage current is a truly DC current that flows through the ONO stack and decreases with time. Electrical stresses demonstrate that irradiation does not reduce the time-to-breakdown of these devices. Noticeably, capacitors with a 9-nm layer as dielectric and irradiated with the same ion specie and with the same fluence do not show any measurable leakage current.

Impact of Heavy-Ion Strikes on Nanocrystal Non Volatile Memory Cell Arrays

We study heavy ion irradiation effects on capacitors with the structure of a Floating Gate Flash cell. We demonstrate that the modifications of the capacitors electrical characteristics observed after irradiation depend on the physical position of the defects produced by ions into the dielectric. In particular, we focus our attention on the leakage current produced by ion irradiation. We demonstrate that SiO2 capacitors feature a leakage current higher than that observed in capacitors with an Oxide-Nitride-Oxide (ONO) stack as dielectric. Finally, we investigate the behavior in time of the leakage produced by ions.

Oxide–Nitride–Oxide Capacitor Reliability Under Heavy-Ion Irradiation

We study proton and heavy ion irradiation effects on phase change memories (PCM) with MOSFET and BJT selectors and the effect of the irradiation on the retention characteristics of these devices. Proton irradiation produces noticeable variations in the cell distributions in PCM with MOSFET selectors mostly due to leakage currents affecting the transistors. PCM with BJT selectors show only small variations after proton irradiation. PCM cells do not appear to be impacted by heavy-ion irradiation. Using high temperature accelerated retention tests, we demonstrate that the retention capability of these memories is not compromised by the irradiation.

Heavy Ion Irradiation Effects on Capacitors With

In this paper, we present a peculiar characteristic of nanocrystal (NC) memory (NCM) cells: The programming (P) windows measured in linear and subthreshold regions are different. A floating-gate flash memory cell with a similar structure does not show the same behavior, and the P window (PW) is independent of the current level of the extrapolation, as expected. By performing 2-D TCAD simulations, we demonstrated that this characteristic of NCM cells is due to the localization of the charge into the NCs. We investigate the correlation between the difference of the PWs in linear and subthreshold regions and the number, width, and position of the NCs.

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In this work we are addressing the threshold voltage instability observed in non volatile nanocrystal memories (NCMs) during the retention experiments under constant applied bias. Such instability derives from the charge motion at the oxide/nitride interface traps of the oxide/nitride/oxide stack employed as control dielectric. We also investigated the impact of temperature on the cell retention properties, showing important and original results that could be attributed to the structure of the control dielectric stack.