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Dive into the research topics where Aleksander Mielczarek is active.

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Featured researches published by Aleksander Mielczarek.


ieee-npss real-time conference | 2014

High-performance image acquisition and processing system with MTCA.4

Dariusz Makowski; Aleksander Mielczarek; Piotr Perek; Grzegorz Jablonski; Mariusz Orlikowski; Bartosz Sakowicz; Andrzej Napieralski; P. Makijarvi; S. Simrock; V. Martin

Fast evolution of high-performance cameras in recent years has made them promising tools for observing transient and fast events in large-scale scientific experiments. Complex experiments, such as ITER, take advantage of high-performance imaging system consisting of several fast cameras working in the range of visible and infrared light. The paper presents a first implementation of complete image acquisition system built on the basis of MTCA.4 architecture, which is dedicated for operation with high-resolution fast cameras equipped with Camera Link interface. Image data from the camera are received by the frame grabber card and transmitted to the host via PCIe interface. The modular structure of MTCA.4 architecture allows connecting several cameras to a single MTCA chassis. The system supports precise synchronization with the time reference using Precision Time Protocol (IEEE 1588). The software support for the system includes low-level drivers and API libraries for all components and high-level EPICS-based environment for system control and monitoring.


international conference mixed design of integrated circuits and systems | 2015

Calibration of stereoscopic camera rigs using dedicated real-time SDI video processor

Aleksander Mielczarek; Piotr Perek; Dariusz Makowski; Andrzej Napieralski; Przemyslaw Sztoch

The paper presents a FPGA-based dedicated system for rapid calibration of 3D camera rigs. The developed device aims to help during camera set-up, by allowing the operator to easily compare the images from two cameras with use of several composition methods. The paper indicates the challenges related to development of high-throughput video processing systems in FPGA circuits. The processing methods were developed and verified using a platform with recent Kintex-7 FPGA device from Xilinx. The article covers the details of the implementation of the image analyser prototype. Moreover it identifies the crucial design considerations and addresses the problems that any FPGA designer can encounter during development of video processing systems.


ieee-npss real-time conference | 2014

Standardized Solution for Management Controller for MTCA.4

Dariusz Makowski; Michael Fenner; Frank Ludwig; Uros Mavric; Aleksander Mielczarek; Andrzej Napieralski; Piotr Perek; Jaroslaw Szewinski; Holger Schlarb

The Micro Telecommunications Computing Architecture (MTCA) standard is a modern platform, that is gaining popularity in the area of High Energy Physics (HEP) experiments. The standard provides extensive management, monitoring and diagnostics functionality. The hardware management is based on the Intelligent Platform Management Interface (IPMI), that was initially developed for management and monitoring of complex computers operation. The original IPMI specification was extended and new functions required for MTCA hardware management, were added. The Module Management Controller (MMC) is required on each Advanced Mezzanine Card installed in MTCA chassis. The Rear Transition Modules (RTMs) require Rear transition module Management Controller (RMC) that is specified in MTCA.4 extension specification. The commercially available implementations of MMC and RMC are expensive and do not provide the whole functionality that is required by specific HEP applications. Therefore, many research centres and commercial companies work on their own implementation of AMC or RTM controllers. The available implementations suffer because of lack of a standard and interoperability problems. The Authors developed a unified solution of management controller fully compliant to AMC and MTCA.4 standards. The MMC v1.00 solution is dedicated for management of AMC and RTM modules. The MMC v1.00 is based on Atmel ATxmega MCU and can be fully customized by user or used as a drop-in-module without any modifications. The paper discusses the functionality of the MMC v1.00 solution. The implementation was verified with developed evaluation kits for AMC and RTM cards.


international conference mixed design of integrated circuits and systems | 2015

Remote control of 3D camera rig with embedded system

Pawel Plewinski; Dariusz Makowski; Aleksander Mielczarek; Andrzej Napieralski; Przemyslaw Sztoch

The production of stereoscopic motion pictures has been recently getting increasingly popular. To provide the best quality of the resulting image, the parameters controlled must precisely correspond to the values calculated by the stereoscopic image analysis platform or chosen by a camera operator. Currently no integrated system exists, which can provide remote monitoring and control of the parameters of 3D rig and cameras on it. The parameters should be controllable both by the Rig Controller software, tablet application or hand controller. The paper discusses an innovative system for remote control of 3D camera rig created within the Recording of 3D Image (ROS3D) research project. The system controls several parameters of both camera rig - stereo base, convergence and camera lenses - focus distance, aperture and focal length. Several approaches of implementation of a solution for the aforementioned problem are presented and compared. The first proposed approach used custom servo motor controller with CAN bus as the communication interface between connected devices, i.e. Rig Controller board and hand manipulators. Another solution contains a commercial servo motor controller connected to the Rig Controller board via RS232 and commercial hand controller. D-Bus Inter-Process Communication (IPC) system is used to communicate between the servo motor controller drivers and Rig Controller software.


international conference mixed design of integrated circuits and systems | 2015

Towards automatic calibration of stereoscopic video systems

Piotr Perek; Dariusz Makowski; Aleksander Mielczarek; Andrzej Napieralski; Przemyslaw Sztoch

The last few years in the movie industry were marked by continuous growth in the popularity of 3D technology. 3D movies are nowadays a major draw for both cinema and TV audiences. The application of 3D technology in combination with modern ultra high-definition video cameras causes that todays movies are more impressive and realistic. However, it also makes their production more and more complex, demanding and expensive. One of the main issues encountered during recording of 3D movies is precise calibration of cameras working together in a 3D stereoscopic system. The calibration process should be performed very carefully to minimize all possible image distortions, because their correction in post-production is usually very long and costly, and sometimes even impossible. One of the most intuitive solution of this problem is calibration performed by a camera operator with using dedicated reference calibration boards. However, it is a long, iterative and subjective process. Taking into account that this process should be performed quite often, at least before every scene, the calibration greatly prolongs the preparation for the video recording and slows down the work on the movie set. All the aforementioned problems caused that the authors made an efforts aimed at automation of the calibration process. The paper presents the requirements and assumptions of the calibration method and first implementation of supporting software application. The main advantages of the presented method is significant reduction of the calibration time and a possibility of objective measurement of the calibration accuracy.


ieee-npss real-time conference | 2014

IEEE 1588 Time Synchronization Board in MTCA.4 Form Factor

Grzegorz Jablonski; Dariusz Makowski; Aleksander Mielczarek; Mariusz Orlikowski; Piotr Perek; Andrzej Napieralski; P. Makijarvi; S. Simrock

Distributed data acquisition and control systems in large-scale scientific experiments, like e.g. ITER, require time synchronization with nanosecond precision. A protocol commonly used for that purpose is the Precise Timing Protocol (PTP), also known as IEEE 1588 standard. It uses the standard Ethernet signalling and protocols and allows obtaining timing accuracy of the order of tens of nanoseconds. The MTCA.4 is gradually becoming the platform of choice for building such systems. Currently there is no commercially available implementation of the PTP receiver on that platform. In this paper, we present a module in the MTCA.4 form factor supporting this standard. The module may be used as a timing receiver providing reference clocks in an MTCA.4 chassis, generating a Pulse Per Second (PPS) signal and allowing generation of triggers and timestamping of events on 8 configurable backplane lines and two front panel connectors. The module is based on the Xilinx Spartan 6 FPGA and thermally stabilized Voltage Controlled Oscillator controlled by the digital-to-analog converter. The board supports standalone operation, without the support from the host operating system, as the entire control algorithm is run on a Microblaze CPU implemented in the FPGA. The software support for the card includes the low-level API in the form of Linux driver, user-mode library, high-level API: ITER Nominal Device Support and EPICS IOC. The device has been tested in the ITER timing distribution network (TCN) with three cascaded PTP-enabled Hirschmann switches and a GPS reference clock source. An RMS synchronization accuracy, measured by direct comparison of the PPS signals, better than 20 ns has been obtained.


Journal of Real-time Image Processing | 2018

Image analyzer for stereoscopic camera rig alignment

Aleksander Mielczarek; Dariusz Makowski; Piotr Perek; Pawel Plewinski; Aleksander Szubert; Andrzej Napieralski

The paper presents a versatile solution facilitating calibration of stereoscopic camera rigs for 3D cinematography and machine vision. Manual calibration of the rig and the camera can easily take several hours. The proposed device eases this process by providing the camera operator with several predefined analyses of the images from the cameras. The Image Analyzer is a compact stand-alone device designed for portable 19″ racks. Almost all video processing is performed on a modern Xilinx FPGA. It is supported by an ARM computer which provides control and video streaming over the Ethernet. The article presents its hardware, firmware and software architectures. The main focus is put on the image processing system implemented in the FPGA.


international conference mixed design of integrated circuits and systems | 2017

Human machine interface for high energy physics experiments

Pawel Plewinski; Dariusz Makowski; Aleksander Mielczarek; Andrzej Napieralski

The increasing complexity of scientific experiments puts a large number of requirements on the systems, which need to control and monitor the hardware components required for the experiments. This article discusses three different technologies of developing Human Machine Interface (HMI) for the Piezo Control System (PCS) developed at the Lodz University of Technology (TUL). The purpose of the PCS system is compensating the detuning of a superconducting accelerating structure caused by the Lorentz force. A set of full-custom HMI operator panels was needed to operate the prototype device. In order to select the technology, which would best suit the requirements; the interface was designed and developed in native Qt, Qt Quick and EPICS. The comparison was made and their advantages and drawbacks are presented.


international conference mixed design of integrated circuits and systems | 2016

SDI image acquisition module for 3D applications

Aleksander Szubert; Dariusz Makowski; Aleksander Mielczarek; Andrzej Napieralski

The paper presents an FMC module for acquisition of 3D image through SDI interface, designed for Registration of Stereoscopic Image (ROS3D) project. As a component of an upgradable FPGA-based system for rapid calibration of 3D camera rigs, the module serves the purpose of acquiring an SDI stream from a set of two cameras and outputting it to either a dedicated SDI output or an HDMI output after processing in the FPGA. The upgradability was achieved with use of a combination of an FMC Carrier Card with the FMC module, which could be redesigned for higher data throughput and replaced in the future. There was no available solution meeting the requirements of the system at the time of the project. The necessary design requirements are discussed and a short specification is given.


international conference mixed design of integrated circuits and systems | 2016

Closed-loop laser stabilization system

Pawel Plewinski; Dariusz Makowski; Aleksander Mielczarek; Andrzej Napieralski

European XFEL is a free electron laser capable of generating light pulses with wavelength as small as 0.05 nm, which will enable observation of objects at the atomic scale.

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Andrzej Napieralski

Lodz University of Technology

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Piotr Perek

Lodz University of Technology

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Grzegorz Jablonski

Lodz University of Technology

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Frank Ludwig

Massachusetts Institute of Technology

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Holger Schlarb

Massachusetts Institute of Technology

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Krzysztof Czuba

Warsaw University of Technology

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Dominik Sikora

Warsaw University of Technology

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Mariusz Orlikowski

Lodz University of Technology

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Julien Branlard

Illinois Institute of Technology

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