Piotr Perek

High-performance image acquisition and processing system with MTCA.4

Fast evolution of high-performance cameras in recent years has made them promising tools for observing transient and fast events in large-scale scientific experiments. Complex experiments, such as ITER, take advantage of high-performance imaging system consisting of several fast cameras working in the range of visible and infrared light. The paper presents a first implementation of complete image acquisition system built on the basis of MTCA.4 architecture, which is dedicated for operation with high-resolution fast cameras equipped with Camera Link interface. Image data from the camera are received by the frame grabber card and transmitted to the host via PCIe interface. The modular structure of MTCA.4 architecture allows connecting several cameras to a single MTCA chassis. The system supports precise synchronization with the time reference using Precision Time Protocol (IEEE 1588). The software support for the system includes low-level drivers and API libraries for all components and high-level EPICS-based environment for system control and monitoring.

Calibration of stereoscopic camera rigs using dedicated real-time SDI video processor

The paper presents a FPGA-based dedicated system for rapid calibration of 3D camera rigs. The developed device aims to help during camera set-up, by allowing the operator to easily compare the images from two cameras with use of several composition methods. The paper indicates the challenges related to development of high-throughput video processing systems in FPGA circuits. The processing methods were developed and verified using a platform with recent Kintex-7 FPGA device from Xilinx. The article covers the details of the implementation of the image analyser prototype. Moreover it identifies the crucial design considerations and addresses the problems that any FPGA designer can encounter during development of video processing systems.

Standardized Solution for Management Controller for MTCA.4

The Micro Telecommunications Computing Architecture (MTCA) standard is a modern platform, that is gaining popularity in the area of High Energy Physics (HEP) experiments. The standard provides extensive management, monitoring and diagnostics functionality. The hardware management is based on the Intelligent Platform Management Interface (IPMI), that was initially developed for management and monitoring of complex computers operation. The original IPMI specification was extended and new functions required for MTCA hardware management, were added. The Module Management Controller (MMC) is required on each Advanced Mezzanine Card installed in MTCA chassis. The Rear Transition Modules (RTMs) require Rear transition module Management Controller (RMC) that is specified in MTCA.4 extension specification. The commercially available implementations of MMC and RMC are expensive and do not provide the whole functionality that is required by specific HEP applications. Therefore, many research centres and commercial companies work on their own implementation of AMC or RTM controllers. The available implementations suffer because of lack of a standard and interoperability problems. The Authors developed a unified solution of management controller fully compliant to AMC and MTCA.4 standards. The MMC v1.00 solution is dedicated for management of AMC and RTM modules. The MMC v1.00 is based on Atmel ATxmega MCU and can be fully customized by user or used as a drop-in-module without any modifications. The paper discusses the functionality of the MMC v1.00 solution. The implementation was verified with developed evaluation kits for AMC and RTM cards.

Towards automatic calibration of stereoscopic video systems

The last few years in the movie industry were marked by continuous growth in the popularity of 3D technology. 3D movies are nowadays a major draw for both cinema and TV audiences. The application of 3D technology in combination with modern ultra high-definition video cameras causes that todays movies are more impressive and realistic. However, it also makes their production more and more complex, demanding and expensive. One of the main issues encountered during recording of 3D movies is precise calibration of cameras working together in a 3D stereoscopic system. The calibration process should be performed very carefully to minimize all possible image distortions, because their correction in post-production is usually very long and costly, and sometimes even impossible. One of the most intuitive solution of this problem is calibration performed by a camera operator with using dedicated reference calibration boards. However, it is a long, iterative and subjective process. Taking into account that this process should be performed quite often, at least before every scene, the calibration greatly prolongs the preparation for the video recording and slows down the work on the movie set. All the aforementioned problems caused that the authors made an efforts aimed at automation of the calibration process. The paper presents the requirements and assumptions of the calibration method and first implementation of supporting software application. The main advantages of the presented method is significant reduction of the calibration time and a possibility of objective measurement of the calibration accuracy.

IEEE 1588 Time Synchronization Board in MTCA.4 Form Factor

Distributed data acquisition and control systems in large-scale scientific experiments, like e.g. ITER, require time synchronization with nanosecond precision. A protocol commonly used for that purpose is the Precise Timing Protocol (PTP), also known as IEEE 1588 standard. It uses the standard Ethernet signalling and protocols and allows obtaining timing accuracy of the order of tens of nanoseconds. The MTCA.4 is gradually becoming the platform of choice for building such systems. Currently there is no commercially available implementation of the PTP receiver on that platform. In this paper, we present a module in the MTCA.4 form factor supporting this standard. The module may be used as a timing receiver providing reference clocks in an MTCA.4 chassis, generating a Pulse Per Second (PPS) signal and allowing generation of triggers and timestamping of events on 8 configurable backplane lines and two front panel connectors. The module is based on the Xilinx Spartan 6 FPGA and thermally stabilized Voltage Controlled Oscillator controlled by the digital-to-analog converter. The board supports standalone operation, without the support from the host operating system, as the entire control algorithm is run on a Microblaze CPU implemented in the FPGA. The software support for the card includes the low-level API in the form of Linux driver, user-mode library, high-level API: ITER Nominal Device Support and EPICS IOC. The device has been tested in the ITER timing distribution network (TCN) with three cascaded PTP-enabled Hirschmann switches and a GPS reference clock source. An RMS synchronization accuracy, measured by direct comparison of the PPS signals, better than 20 ns has been obtained.

Polyhedral Source-to-Source Compiler

This paper describes a tool which enables source to source compilation. Implemented Polyhedral Source-to-Source Compiler (PSSC) is based on Polly compiler and LLVM infrastructure and it enables automatic recognition of parallel regions of C/C++ code and annotating them with OpenMP / OpenACC pragmas. The analysis of the input code is done by Polly compiler and then the results are mapped to original source code. This approach allows automatic parallelization of old code, it also ensures high level of code portability and it provides the possibility of manual optimization of the output code. Experimental results of the PSSC compiler have shown that the proposed compiler is able to reach the comparable performance as the original Polly compiler does.

Image analyzer for stereoscopic camera rig alignment

The paper presents a versatile solution facilitating calibration of stereoscopic camera rigs for 3D cinematography and machine vision. Manual calibration of the rig and the camera can easily take several hours. The proposed device eases this process by providing the camera operator with several predefined analyses of the images from the cameras. The Image Analyzer is a compact stand-alone device designed for portable 19″ racks. Almost all video processing is performed on a modern Xilinx FPGA. It is supported by an ARM computer which provides control and video streaming over the Ethernet. The article presents its hardware, firmware and software architectures. The main focus is put on the image processing system implemented in the FPGA.

Human Machine Interface for data acquisition systems applied in High Energy Physics

Nowadays high energy physics scientists build and design systems that are complex in terms of the huge amount of subsystems and individual components. A single subsystem may consist of a few tens of thousands digital and analogue channels and sensors. As a result, the data rates captured in modern systems may result in gigabytes per second. Complex systems could generate various alarms and provide other diagnostic information. Consequently, a huge number of variables are needed to control and monitor the system. It could be a real challenge to provide access to all alarms and diagnostic information in systems composed of thousands of channels. In this sense, it is necessary to develop a Human Machine Interfaces (HMI) that will be simple enough to describe a complex system and detailed enough to present all the relevant information to the operators. The purpose of this paper is to describe and propose an HMI scheme able to obtain and present data from High Energy Physics systems. The purpose of this paper is to evaluate HMI for complex systems. The prototype HMI described is based on the demonstration PXIe-based Neutron Flux Monitor (NFM) developed by the Department of Microelectronics and Computer Science. This NFM is going to provide essential information for plasma operation in the ITER plant. The HMI involves a Graphical User Interface and an Alarm Management Scheme, all based on the Experimental Physics and Industrial Control System (EPICS) framework. The Graphical User Interface (GUI) includes the use of several tools provided by the Control System Studio as well as JavaScript, rules and actions to dynamically present data to the operators. In regards to alarm management, a scheme is proposed to efficiently handle alarms by presenting the relevant information and controls to quickly react to alarms.

Efficient uncalibrated rectification method for stereo vision systems

Along with the rapid development of stereoscopic cinematography in the last few years, efficient 3D video diagnostic tools are increasingly in demand. The tools dedicated for real-time video analysis and assessment directly on the movie set are aimed at facilitation, acceleration and cost-cutting of movie production. It causes the growing interest in development of high-performance and reliable algorithms for stereoscopic video processing. One of the algorithms strictly related to 3D video processing is image rectification. It is aimed at transformation of the stereopair images in such a way that epipolar lines are horizontal and match up between views. The rectification is often a required preprocessing step for depth estimation algorithms because it simplifies searching for matching points in stereo images. The paper presents an overview and comparison of image rectification methods for the application in real-time diagnostic tools for stereoscopic cinematography. It also describes the implementation and evaluation of the rectification algorithm based on [1] that has been finally selected for the needs of diagnostic tool for stereo rig calibration and disparity map estimation developed by the authors. Described algorithm ensures very accurate image alignment and minimization of vertical disparity for the needs of disparity map calculation. Moreover, it is resistant to lens distortions in input image and does not introduce significant distortions in output image preserving the original viewpoint of the cameras.

A simple multithreaded C++ framework for high-performance data acquisition systems

Data acquisition systems must be capable to process all the data produced by the source to ensure the highest level of accuracy, especially when it deals with hard real-time system monitoring. However, the production of data is faster than the process to acquire and to process such a data. Using concurrency approach is an alternative to obtain the required level of performance and data processing. This paper presents the comparison between various C++ frameworks that using multithreading technology and ring-buffer data structure allow data transfer in concurrent way. The comparison is based on the time interval between the instant when data is published and the instant when the data is gathered. These latency measurements have been taken using the structure of one producer and two consumers for all evaluated frameworks. The results show that it is possible to achieve suitable performance using standard C++ libraries to develop a simple framework for data acquisition systems.