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Dive into the research topics where Alex Pappachen James is active.

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Featured researches published by Alex Pappachen James.


Information Fusion | 2014

Medical image fusion: A survey of the state of the art

Alex Pappachen James; Belur V. Dasarathy

Medical image fusion is the process of registering and combining multiple images from single or multiple imaging modalities to improve the imaging quality and reduce randomness and redundancy in order to increase the clinical applicability of medical images for diagnosis and assessment of medical problems. Multi-modal medical image fusion algorithms and devices have shown notable achievements in improving clinical accuracy of decisions based on medical images. This review article provides a factual listing of methods and summarizes the broad scientific challenges faced in the field of medical image fusion. We characterize the medical image fusion research based on (1) the widely used image fusion methods, (2) imaging modalities, and (3) imaging of organs that are under study. This review concludes that even though there exists several open ended technological and scientific challenges, the fusion of medical images has proved to be useful for advancing the clinical reliability of using medical imaging for medical diagnostics and analysis, and is a scientific discipline that has the potential to significantly grow in the coming years.


Pattern Recognition | 2010

Inter-image outliers and their application to image classification

Alex Pappachen James; Sima Dimitrijev

Image variability that is impossible or difficult to restore by intra-image processing, such as the variability caused by occlusions, significantly reduces the performance of image-recognition methods. To address this issue, we propose that the pixels associated with large distances obtained by inter-image pixel-by-pixels comparisons should be considered as inter-image outliers and should be removed from the similarity calculation used for the image classification. When this method is combined with the template-matching method for image recognition, it leads to state-of-the-art recognition performance: 91% with AR database that includes occluded face images, 90% with PUT database that includes pose variations of face images and 100% with EYale B database that includes images with large illumination variation.


IEEE Signal Processing Letters | 2008

Face Recognition Using Local Binary Decisions

Alex Pappachen James; Sima Dimitrijev

The human brain exhibits robustness against natural variability occurring in face images, yet the commonly attempted algorithms for face recognition are not modular and do not apply the principle of binary decisions made by the firing of neurons. We present a biologically inspired modular unit implemented as an algorithm for face recognition that applies pixel-wise local binary decisions on similarity of spatial-intensity change features. The results obtained with a single gallery image per person show a robust and high recognition performance: 94% on AR, 98% on Yale, 97% on ORL, 97% on FERET (fb), 92% on FERET (fc), and 96% on Caltech face image databases.


The Computer Journal | 2012

Nearest Neighbor Classifier Based on Nearest Feature Decisions

Alex Pappachen James; Sima Dimitrijev

High feature dimensionality of realistic datasets adversely affects the recognition accuracy of nearest neighbor (NN) classifiers. To address this issue, we introduce a nearest feature classifier that shifts the NN concept from the global-decision level to the level of individual features. Performance comparisons with 12 instance-based classifiers on 13 benchmark University of California Irvine classification datasets show average improvements of 6 and 3.5% in recognition accuracy and area under curve performance measures, respectively. The statistical significance of the observed performance improvements is verified by the Friedman test and by the post hoc Bonferroni–Dunn test. In addition, the application of the classifier is demonstrated on face recognition databases, a character recognition database and medical diagnosis problems for binary and multi-class diagnosis on databases including morphological and gene expression features.


IEEE Transactions on Neural Networks | 2017

A Survey of Memristive Threshold Logic Circuits

Akshay Kumar Maan; Deepthi Anirudhan Jayadevi; Alex Pappachen James

In this paper, we review different memristive threshold logic (MTL) circuits that are inspired from the synaptic action of the flow of neurotransmitters in the biological brain. The brainlike generalization ability and the area minimization of these threshold logic circuits aim toward crossing Moore’s law boundaries at device, circuits, and systems levels. Fast switching memory, signal processing, control systems, programmable logic, image processing, reconfigurable computing, and pattern recognition are identified as some of the potential applications of MTL systems. The physical realization of nanoscale devices with memristive behavior from materials, such as TiO2, ferroelectrics, silicon, and polymers, has accelerated research effort in these application areas, inspiring the scientific community to pursue the design of high-speed, low-cost, low-power, and high-density neuromorphic architectures.


IEEE Transactions on Very Large Scale Integration Systems | 2014

Resistive Threshold Logic

Alex Pappachen James; Linu Rose V. J. Francis; Dinesh Kumar

We report a resistance-based threshold logic family useful for mimicking brain-like large variable logic functions in VLSI. A universal boolean logic cell based on an analog resistive divider and threshold logic circuit is presented. The resistive divider is implemented using memristors, and provides output voltage as a summation of weighted product of input voltages. The output of the resistive divider is converted into a binary value by a threshold operation implemented by CMOS inverter and/or Opamp. A universal cell structure is presented to decrease the overall implementation complexity and number of components. When the number of input variables becomes very high, the proposed cell offers advantages of smaller area and design simplicity in comparison with CMOS-based logic circuits.


Electronics Letters | 2010

Cognitive memory network

Alex Pappachen James; Sima Dimitrijev

A resistive memory network that has no crossover wiring is proposed to overcome the hardware limitations to size and functional complexity that is associated with conventional analogue neural networks. The proposed memory network is based on simple network cells that are arranged in a hierarchical modular architecture. Cognitive functionality of this network is demonstrated by an example of character recognition. The network is trained by an evolutionary process to completely recognise characters deformed by random noise, rotation, scaling and shifting.


Human-centric Computing and Information Sciences | 2012

Ranked selection of nearest discriminating features

Alex Pappachen James; Sima Dimitrijev

BackgroundFeature selection techniques use a search-criteria driven approach for ranked feature subset selection. Often, selecting an optimal subset of ranked features using the existing methods is intractable for high dimensional gene data classification problems.MethodsIn this paper, an approach based on the individual ability of the features to discriminate between different classes is proposed. The area of overlap measure between feature to feature inter-class and intra-class distance distributions is used to measure the discriminatory ability of each feature. Features with area of overlap below a specified threshold is selected to form the subset.ResultsThe reported method achieves higher classification accuracies with fewer numbers of features for high-dimensional micro-array gene classification problems. Experiments done on CLL-SUB-111, SMK-CAN-187, GLI-85, GLA-BRA-180 and TOX-171 databases resulted in an accuracy of 74.9±2.6, 71.2±1.7, 88.3±2.9, 68.4±5.1, and 69.6±4.4, with the corresponding selected number of features being 1, 1, 3, 37, and 89 respectively.ConclusionsThe area of overlap between the inter-class and intra-class distances is demonstrated as a useful technique for selection of most discriminative ranked features. Improved classification accuracy is obtained by relevant selection of most discriminative features using the proposed method.


Analog Integrated Circuits and Signal Processing | 2018

Neuron inspired data encoding memristive multi-level memory cell

Aidana Irmanova; Alex Pappachen James

Mapping neuro-inspired algorithms to sensor backplanes of on-chip hardware require shifting the signal processing from digital to the analog domain, demanding memory technologies beyond conventional CMOS binary storage units. Using memristors for building analog data storage is one of the promising approaches amongst emerging non-volatile memory technologies. Recently, a memristive multi-level memory cell for storing discrete analog values has been developed in which memory system is implemented combining memristors in voltage divider configuration. In given example, the memory cell of 3 sub-cells with a memristor in each was programmed to store ternary bits which overall achieved 10 and 27 discrete voltage levels. However, for further use of proposed memory cell in analog signal processing circuits data encoder is required to generate control voltages for programming memristors to store discrete analog values. In this paper, we present the design and performance analysis of data encoder that generates write pattern signals for 10 level memristive memory.


international symposium on circuits and systems | 2016

A design of HTM spatial pooler for face recognition using memristor-CMOS hybrid circuits

Timur Ibrayev; Alex Pappachen James; Cory E. Merkel; Dhireesha Kudithipudi

Hierarchical Temporal Memory (HTM) is a machine learning algorithm that is inspired from the working principles of the neocortex, capable of learning, inference, and prediction for bit-encoded inputs. Spatial pooler is an integral part of HTM that is capable of learning and classifying visual data such as objects in images. In this paper, we propose a memristor-CMOS circuit design of spatial pooler and exploit memristors capabilities for emulating the synapses, where the strength of the weights is represented by the state of the memristor. The proposed design is validated on a challenging application of single image per person face recognition problem using AR database resulting in a recognition accuracy of 80%.

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Sherin Sugathan

Indian Institute of Information Technology and Management

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K. R. Ajayan

Indian Institute of Science

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