Olga Krestinskaya

Memristor load current mirror circuit

Simple current mirrors with semiconductor resistive loads suffer from large on-chip area, leakage currents and thermal effects. In this paper, we report the feasibility of using memristive loads as a replacement of semiconductor resistors in simplistic current mirror configuration. We report power, area and total harmonic distribution, and report the corner conditions on resistance tolerances.

Feature extraction without learning in an analog spatial pooler memristive-CMOS circuit design of hierarchical temporal memory

Hierarchical temporal memory (HTM) is a neuromorphic algorithm that emulates sparsity, hierarchy and modularity resembling the working principles of neocortex. Feature encoding is an important step to create sparse binary patterns. This sparsity is introduced by the binary weights and random weight assignment in the initialization stage of the HTM. We propose the alternative deterministic method for the HTM initialization stage, which connects the HTM weights to the input data and preserves natural sparsity of the input information. Further, we introduce the hardware implementation of the deterministic approach and compare it to the traditional HTM and existing hardware implementation. We test the proposed approach on the face recognition problem and show that it outperforms the conventional HTM approach.

Unified Model for Contrast Enhancement and Denoising

In this paper, we attempt a challenging task to unify two important complementary operations, i.e. contrast enhancement and denoising, that is required in most image processing applications. The proposed method is implemented using practical analog circuit configurations that can lead to near real-time processing capabilities useful to be integrated with vision sensors. Metrics used for performance includes estimation of Residual Noise Level (RNL), Structural Similarity Index Measure (SSIM), Output-to-Input Contrast Ratio (CRo_i), and its combined score (SCD). The class of contrast stretching methods has resulted in higher noise levels (RNL ≥ 7) along with increased contrast measures (CRo-i ≥ eight times than that of the input image) and SSIM ≤ 0.52. Denoising methods generates images with lesser noise levels (RNL ≤ 0.2308), poor contrast enhancements (CRo-i ≤ 1.31) and with best structural similarity (SSIM ≥ 0.85). In contrast, the proposed model offers best contrast stretching (CRo-i = 5.83), least noise (RNL = 0.02), a descent structural similarity (SSIM = 0.6453) and the highest combined score (SCD = 169).

Perceptron Linear Activation Function Design with CMOS-Memristive Circuits

In the last decade, the interest to emulate of the functionality and structure of the human brain to solve the problems related to image processing and pattern recognition, especially using to Artificial Neural Network (ANN), has significantly increased. The capability of ANN to perform at highspeed has been proven to be very useful for various large scale problems. One of the simple ANN models is perceptron. Since the perceptron is the basic form of a neural network, the efficient implementation of an activation functions is required to build the neural network on hardware. As various works introduce the design of sigmoid and tangent activation functions, most of the other activation functions remain an open research problem. This paper describes the design of the perception circuit with the linear activation function based on operational amplifier for memristive crossbar based neural networks. Additionally, the variation of performance with temperature and noise noise analysis of the circuit are presented.

Variability Analysis of Memristor-based Sigmoid Function

Activation functions are widely used in neural networks to decide the activation value of the neural unit based on linear combinations of the weighted inputs. The effective implementation of activation function is highly important to enhance he performance of a neural network. One of the most widely used activation functions is sigmoid. Therefore, there is a growing interest to enhance the performance of sigmoid circuits. In this paper, the main objective is to modify existing current mirror based sigmoid model by replacing CMOS transistors with memristive devices. We present the performance, variation of transistor sizes and temperature. The area, power and noise in the modified CMOS-memristive sigmoid circuit are shown. The application of memristors in the sigmoid circuit ensures the reduction of on-chip area, and power dissipation by 7%. The proposed sigmoid circuit was simulated in SPICE using TSMC 180nm CMOS design process.

Facial emotion recognition using min-max similarity classifier

Recognition of human emotions from the imaging templates is useful in a wide variety of human-computer interaction and intelligent systems applications. However, the automatic recognition of facial expressions using image template matching techniques suffer from the natural variability with facial features and recording conditions. In spite of the progress achieved in facial emotion recognition in recent years, the effective and computationally simple feature selection and classification technique for emotion recognition is still an open problem. In this paper, we propose an efficient and straightforward facial emotion recognition algorithm to reduce the problem of inter-class pixel mismatch during classification. The proposed method includes the application of pixel normalization to remove intensity offsets followed-up with a Min-Max metric in a nearest neighbor classifier that is capable of suppressing feature outliers. The results indicate an improvement of recognition performance from 92.85% to 98.57% for the proposed Min-Max classification method when tested on JAFFE database. The proposed emotion recognition technique outperforms the existing template matching methods.

Bioinspired memory model for HTM face recognition

Inspired from the working principle of human memory, we propose a new algorithm for storing HTM features detected from images. The resulting features from the training set require lower memory than existing HTM training set. The proposed features are tested in a face recognition problem using the benchmark AR dataset. the simulation results show that the proposed algorithm gives higher face recognition accuracy, in comparison to the conventional methods.