Alexander Essaian

3D stacked embedded component system-in-package for wearable electronic devices

This paper discusses design, fabrication and characterization of a 3D stacked small form factor (SFF) system-in-packages (SiPs) suitable for wearable electronics systems. In order to achieve very small size SiP, two SFF multi-chip packages were designed and fabricated utilizing embedded wafer-level ball grid array (e-WLB) technology. The package consisted of six radio frequency (RF) and digital integrated circuits (ICs), and 24 passive components of varying sizes. 3-D stacked system in package was of size 6.0 × 5.5 × 1.9 mm and was 55% smaller than the same system fabricated using conventional printed circuit board technology. The measured results showed that system performance was on par with or better than the previous systems.