Rahul C. Shah

Data MULEs: modeling a three-tier architecture for sparse sensor networks

This paper presents and analyzes an architecture to collect sensor data in sparse sensor networks. Our approach exploits the presence of mobile entities (called MULEs) present in the environment. MULEs pick up data from the sensors when in close range, buffer it, and drop off the data to wired access points. This can lead to substantial power savings at the sensors as they only have to transmit over a short range. This paper focuses on a simple analytical model for understanding performance as system parameters are scaled. Our model assumes two-dimensional random walk for mobility and incorporates key system variables such as number of MULEs, sensors and access points. The performance metrics observed are the data success rate (the fraction of generated data that reaches the access points) and the required buffer capacities on the sensors and the MULEs. The modeling along with simulation results can be used for further analysis and provide certain guidelines for deployment of such systems.

Characteristics of on-body 802.15.4 networks

One would expect a body-area network to have consistently good connectivity, given the relatively short distances involved. However, early experimental results suggest otherwise. This poster examines the characteristics of the links in an on-body IEEE 802.15.4 network and the factors that influence link performance. We demonstrate that node location, as well as body position, significantly affects connectivity. For example, connectivity in the sitting position tends to be much worse than standing. We will present a comprehensive evaluation including various combinations of changes in node orientation, node placement, body position, and environmental factors. Preliminary results clearly demonstrate the need for researching different radios, topologies and protocol design to make body area networks viable.

Interference Detection and Mitigation in IEEE 802.15.4 Networks

Proper frequency planning is essential to enable multiple IEEE 802.15.4 networks to coexist in the same space, otherwise the network performance can be adversely affected due to interference. While this may be feasible for static networks, it is not really an option for mobile networks such as body area networks due to the dynamic nature of these interactions. This work demonstrates one approach to detecting and mitigating interference in IEEE 802.15.4 networks from other 802.15.4 networks. Interference is detected by observing packets from other networks while the mitigation strategy leverages collaboration between interfering networks to determine which network should switch to a different channel. The approach can also work with legacy networks that do not implement this protocol. The system is implemented and demonstrated on Intel Mote2 devices running Tiny OS.

Classifying the mode of transportation on mobile phones using GIS information

Determining the mode of transport of an individual is an important element of contextual information. In particular, we focus on differentiating between different forms of motorized transport such as car, bus, subway etc. Our approach uses location information and features derived from transit route information (schedule information, not real-time) published by transit agencies. This enables no up-front training or learning of routes and can be deployed instantly to a new place since most transit agencies publish this information. Combined with motion detection using phone accelerometers, we obtain a classification accuracy of around 90% on 50+ hours of car and transit data.

Power and CAD considerations for the 1.75mbyte, 1.2ghz L2 cache on the alpha 21364 CPU

A 1.75 MByte L2 cache has been designed and fabricated as part of the Alpha 21364 microprocessor[1] (Figure 1), in a .18m bulk CMOS process. The cache was designed to run at 1.2 GHz, and pass-1 samples confirm this. While Alpha CPUs are known primarily for high speed, the combination of package constraints and a tight schedule forced careful attention to the integrated whole of power expenditure and the interaction of CAD with design. The cache consumes only 7% of total die power.

Edge Processing and Enterprise Integration: Closing the Gap on Deployable Industrial Sensor Networks

The next frontier of sensor networking is integration: building operational systems that meet business requirements and integrate with existing business processes. We describe an industrial deployment and the system architecture that overcomes challenges in energy efficiency, system reliability, data fidelity, and flexible integration. We evaluate the performance of these deployments and consider various system enhancements that impact performance.

Mago: Mode of Transport Inference Using the Hall-Effect Magnetic Sensor and Accelerometer

In this paper, we introduce Mago, a novel system that can infer a persons mode of transport (MOT) using the Hall-effect magnetic sensor and accelerometer present in most smart devices. When a vehicle is moving, the motions of its mechanical components such as the wheels, transmission and the differential distort the earths magnetic field. The magnetic field is distorted corresponding to the vehicle structure (e.g., bike chain or car transmission system), which manifests itself as a strong signal for sensing a persons transportation modality. We utilize this magnetic signal combined with the accelerometer and design a robust algorithm for the MOT detection. In particular, our system extracts frame-based features from the sensor data and can run in nearly real-time with only a few seconds of delay. We evaluated Mago using over 70 hours of daily commute data from 7 participants and the leave-one-out analysis of our cross-user, cross-device model reports an average accuracy of 94.4% among seven classes (stationary, bus, bike, car, train, light rail and scooter). Besides MOT, our system is able to reliably differentiate the phones in-car position at an average accuracy of 92.9%. We believe Mago could potentially benefit many contextually-aware applications that require MOT detection such as a digital personal assistant or a life coaching application.

Variation tolerant digitally assisted high-speed IO PHY

Technology scaling leads to reduction of supply voltage and increase in random device variability and thus creates new challenges for analog design. A complete overhaul of the design approach at system architecture and circuit topology levels is necessary to keep the link robust and tolerant to low supply voltage and random variability challenges. This paper presents key analog circuit architecture techniques employed to implement 6.4GT/s per lane, 14mW/Gbps analog front end high-speed IO interfaces on Poulson — a 32nm next generation Intel Itanium microprocessor [1].