Alexander Hanss

Solder Process for Fluxless Solder Paste Applications

Fluxless soldering, i.e. residue free soldering with the aid of gaseous activation is known for many years, but only well established in the field of opto-and microwave electronics. In low cost high volume applications this technology has not yet become mainstream. In the fluxless soldering the wetting of the solder is made possible by means of an activating process gas. After the soldering process, no cleaning process is necessary because no corrosive residues are left on the circuit boards and components. Therefore soldering using solder paste without aggressive chemical ingredients has a high market potential. Expensive preforms could be replaced by paste dispensing or paste printing. In this paper, a residue free SnAgCu solder paste and a suitable soldering process is developed and presented. It is applied on high power ceramic LED packages and unpackaged flip chip LEDs which can be assembled directly on a substrate. In this paper the main paste properties such as printability of a commercial flux solder paste with those of the fluxless solder paste are compared. Likewise, the soldering results after a reflow process of these different paste systems are evaluated and compared. Different solder joint analysis methods like X-Ray, the transient thermal analysis, cross section and shear strength tests are presented in this paper. Finally a measurement technique to detect contamination on a soldered module is shown. There is a possibility that the concept and process proposed and demonstrated in this paper can reduce the production costs of electronic systems and improve the quality of soldered electronic modules.

The influence of voids in solder joints on thermal performance and reliability investigated with transient thermal analysis

The thermal management of modern high power LEDs is essential for their life time. An important aspect is the thermal path from the heat generated in the LED die and phosphor, over the printed circuit board (PCB) to the heat sink. The temperature of the LED die depends on the quality of the solder joint between the LED package and the copper pads on the PCB. To evaluate the quality of the solder joint the transient thermal analysis is a powerful tool. In this paper the relative thermal resistance method is applied to detect the initial increase of the thermal resistance by voids in the solder joint and furthermore the impact of the initial voids on the reliability of the ceramic LED packages. The investigation in this paper reveals that the samples with voids have initially solely a slightly higher thermal resistance but the voids cause a significant faster thermal degradation during temperature shock test due to increased crack growth in the solder joint.

Thermogravimetric investigation on the interaction of formic acid with solder joint materials

Soldering is a dominating process for semiconductor packaging. For electronic manufacturing tin based solders play a key role. The surface of most solder alloys is oxidized under an oxygen containing atmosphere. Usually reducing chemicals, called fluxing agents, are used to enable the formation of solder contacts. However, standard liquid flux leaves aggressive residues on the electronic devices. Clean processes were developed using gaseous flux, i.e. formic acid vapor. Despite the competitiveness of the reducing effect of formic acid vapour on many solder alloys, only little is known about the corresponding reaction mechanism, especially at the surface. An oxidized copper powder and a tin–silver–copper alloy were investigated using thermogravimetric and mass spectra analysis under formic acid flow. Details on the adsorbed and desorbed species and the formation of intermediates and decomposition products are presented. Activation temperatures are estimated and correlated with heating processes.

The influence of the phosphor layer as heat source and up-stream thermal masses on the thermal characterization by transient thermal analysis of modern wafer level high power LEDs

Abstract In the last years Waver Level LED Packages (WLP-LEDs) were developed. They are thin film flip chips where the sapphire substrate remains attached on top of the epitaxial light emitting layer (EPI) which can be assembled directly on a printed circuit board. The thermal resistance and the thermal path of WLP-LED packages are measured by transient thermal analysis and transient finite element simulation. This study investigates the impact of the upstream thermal masses, i.e. the sapphire (SP), phosphor layer (PL) and the side coating (SC) on the transient thermal impedance curve and the cumulative structure function. It is shown that the standard approach to extract thermal properties by features (steps) within the structure function is misleading for thermal networks with upstream thermal load and distributed heat source (EPI and PL) because they influence the shape of the structure function. By transient thermal measurements and finite element (FE) simulation the transient thermal measurements are analysed to extract information about the thermal parameters and the thermal path. Starting from the analysis of the blue flip chip LED (FC-LED, no PL and no SC) the FE-model is set up. Stepwise the FE model is extended and the influence of the PL and the SC on the transient thermal measurement is investigated. A FE model is validated and calibrated which allows simulating the transient thermal curves of these modern LEDs. Using the model the impact of structural changes in the LED package on the transient thermal curves can be identified for reliability analysis.

Residual free solder process for fluxless solder pastes

Fluxless soldering, i.e. residue free soldering with the aid of gaseous activation is known for many years, but only well established in the field of opto-and microwave electronics. In low cost high volume applications this technology has not yet become mainstream. In the fluxless soldering the reducing of oxide layers and therefore the wetting of the solder is enabled by means of an activating process gas. After the soldering process, no cleaning process is necessary because no corrosive residues are left on the circuit boards and components. Therefore soldering using solder paste without aggressive chemical ingredients has a high market potential. Expensive preforms could be replaced by paste dispensing or paste printing. The reducing effect of gaseous activator like formic acid vapor on many solder alloys is known in practice. But a detailed scientific analysis on the corresponding reaction mechanisms, especially at the surfaces, only little is investigated. Different chemical reaction channels can occur on the solder surface, i.e. catalytically dissociation of formic acid on the pure or oxidized metal surface and the formation and evaporation of metal formates. In this paper, different solder alloys (SnAgCu, SnPb, BiSn, In) were analyzed with thermal gravimetric analysis (TGA) under formic acid flow. Details on mass change depended to the soldering temperature are presented. Activation temperatures are estimated and correlated to heating processes. Based on the analysis, fluxless solder pastes and suitable soldering processes are developed and presented. It is applied on high power unpackaged flip chip LEDs which can be assembled directly on a substrate. In this paper the main paste properties such as printability of a commercial flux solder paste with those of the fluxless solder paste are compared. Likewise, the soldering results after a reflow process of these different paste systems are evaluated and compared. The experimental results show that the thermogravimetric method is an efficient way to gain deeper understanding of the redox processes which occur under formic acid activation. It is possible to solder residue-free with a fluxless solder paste. The resulting solder joints have the same quality as those for standard solder paste in terms of voids detected by X-Ray, mechanical integrity by shear strength.

New Method to Separate Failure Modes by Transient Thermal Analysis of High Power LEDs

A high reliability of light emitting diode (LED) light sources is essential for general and automotive lighting applications, where exchange of LED components is expensive. Thermal management of modern high power LEDs is crucial for their lifetime. An important aspect is the thermal path for heat conduction. Many different defects can have an influence on this path of an electronic system: on the one hand process failures during production, e.g. voids inside the solder joint, on the other hand typical failures induced by thermo-mechanical stress during their lifetime, like cracks in the solder joint or delamination in the package. The transient thermal analysis (TTA) is a powerful tool to detect changes in the thermal path. Due to improvements in the TTA method during the last years, not only cracks can be detected but also failure modes can be separated, and the root cause can be analyzed by support of transient finite element analysis. In this paper, transient thermal testing is applied and further developed, to monitor the structural integrity of new wafer level LED packages during thermal stress testing. Failure modes are defined and separated. For failure analysis the different defects are simulated by transient finite element analysis and correlated to the TTA results. The simulation results, that solder cracks increase the peak height of the derivative of the transient thermal curves (b(z)). A delamination of an inner layer of the LED package creates additionally to the increase of the peak height also a separation of the b(z) curves between 1 µs and 5 µs. Therefore a transient thermal measurement equipment with a dead time

Self alignment of flip chip LEDs on PCB for high position accuracy

Recent progress in wafer level packaging technologies has enabled high power flip chip (FC-LEDs) for direct assembly on printed circuit boards (PCB) for general and automotive lighting applications. Based on LEDs with a light emitting area of 0.5mm2 arrays for miniaturized modules are realized. The individual LEDs are single addressable, the pitch is solely 790μm and the gap between the light emitting areas down to 90μm. This is challenging the PCB design but due to progress of PCB manufacturing technologies realistic designs can be realized. The primary and/or secondary optics for the LEDs are assembled using mechanical features like drilled holes. To enable passive alignment between the LED surfaces and optical elements the position tolerance between the LED light emitting area with respect to mechanical alignment structures like drilled holes requires an accuracy around 50-100μm (application dependent). In the field of optoelectronics self alignment of laser and photo diodes utilizing the surface tension of the liquid solder on silicon or ceramic substrates is standard and alignment accuracy in the range of 1μm can be reached. However on PCB self-alignment evan in the range of 10μm gets challenging. In the paper, the post soldering tolerance of the LEDs with respect to the solder mask, the electrical layer and drilling holes is investigated. Solder pad design, stencil thickness and design (solder volume) was varied and the post soldering accuracy measured. Standard type 5 paste and special is used. The accuracy in plane (xy) and tilt was measured using a 3D digital microscope before and after reflow. The tilt of the FC-LED was observed to be an important root cause for xy-tolerances of the LEDs. The solder volume was reduced until the amount of solder was too small for effective self alignment. Using well designed solder pads and solder volume the tilt of the components is reduced to acceptable 1-2° and a position accuracy (xy) in the range of 5μm (standard derivation) was reached.

The influence of phosphor layer and sidecoating on the thermal performance and the structure function of modern waver level high power LEDs

Many modern Waver Level LED Packages (WLP-LEDs) are thin film flip chips with the sapphire substrate attached on top of the epitaxial light emitting layer (EPI). This study targets to investigate the impact of the upstream thermal masses of the sapphire, the phosphor layer (PL) and the side coating (SC) on the transient thermal impedance curve and the cumulative structure function. It is shown that the standard approach to extract thermal properties by features (steps) within the structure function is not appropriate for this kind of LEDs. By transient Finite Element (FE) simulation the transient thermal measurements are analysed to extract information about the thermal parameters and the thermal path. Starting from the analysis of the blue flip chip LED (FC-LED) the FE-model is set up. Stepwise the FE model is extended and the influence of the PL and the SC on the transient thermal measurement is investigated.