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Dive into the research topics where Alexander Kalnitsky is active.

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Featured researches published by Alexander Kalnitsky.


IEEE Electron Device Letters | 1998

Transistor characteristics with Ta/sub 2/O/sub 5/ gate dielectric

Donggun Park; Ya-Chin King; Qiang Lu; Tsu-Jae King; Chenming Hu; Alexander Kalnitsky; Sing-Pin Tay; Chia-Cheng Cheng

As the gate oxide thickness decreases below 2 nm, the gate leakage current increases dramatically due to direct tunneling current. This large gate leakage current will be an obstacle to reducing gate oxide thickness for the high speed operation of future devices. A MOS transistor with Ta/sub 2/O/sub 5/ gate dielectric is fabricated and characterized as a possible replacement for MOS transistors with ultra-thin gate silicon dioxide. Mobility, I/sub d/-V/sub d/, I/sub d/-V/sub g/, gate leakage current, and capacitance-voltage (C-V) characteristics of Ta/sub 2/O/sub 5/ transistors are evaluated and compared with SiO/sub 2/ transistors. The gate leakage current is three to five orders smaller for Ta/sub 2/O/sub 5/ transistors than SiO/sub 2/ transistors.


IEEE Electron Device Letters | 1998

Leakage current comparison between ultra-thin Ta 2 O 5 films and conventional gate dielectrics

Qiang Lu; Donggun Park; Alexander Kalnitsky; Celene Chang; Chia-Cheng Cheng; S. P. Tay; Tsu-Jae King; Chenming Hu

Capacitors with ultra-thin (6.0-12.0 nm) CVD Ta/sub 2/O/sub 5/ film were fabricated on lightly doped Si substrates and their leakage current (I/sub g/-V/sub g/) and capacitance (C-V) characteristics were studied. For the first time, samples with stack equivalent oxide thickness around 2.0 nm were compared with ultra-thin silicon dioxide and silicon oxynitride. The Ta/sub 2/O/sub 5/ samples showed remarkably lower leakage current, which not only verified the advantages of ultra-thin Ta/sub 2/O/sub 5/ as dielectrics for high density DRAMs, but also suggested the possibility of its application as the gate dielectric material in MOSFETs.


international electron devices meeting | 1998

SiON/Ta/sub 2/O/sub 5//TiN gate-stack transistor with 1.8 nm equivalent SiO/sub 2/ thickness

Donggun Park; Qiang Lu; Tsu-Jae King; Chenming Hu; Alexander Kalnitsky; Sing-Pin Tay; Chia-Cheng Cheng

SiON/Ta/sub 2/O/sub 5/ stacked gate dielectric exhibits 3-5 orders smaller leakage current than SiO/sub 2/ at 1.8 nm, while the transistor characteristics such as mobility, I/sub d/-V/sub g/, and I/sub d/-V/sub d/, are similar to those of SiO/sub 2/ transistor. N-channel MOSFET with equivalent SiO/sub 2/ thickness down to 1.8 nm (1.4 nm equivalent due to elimination of poly-Si depletion) is demonstrated. Process effects are also studied for optimum process condition.


Biosensors and Bioelectronics | 2018

Proton-ELISA: Electrochemical immunoassay on a dual-gated ISFET array

Duane S. Juang; Ching-Hui Lin; Yi-Ren Huo; Chia-Yu Tang; Chun-Ren Cheng; Hua-Shu Wu; Shih-Fen Huang; Alexander Kalnitsky; Chun-Cheng Lin

Here we report an electrochemical immunoassay platform called Proton-ELISA (H-ELISA) for the detection of bioanalytes. H-ELISA uniquely utilizes protons as an immunoassay detection medium, generated by the enzyme glucose oxidase (GOx) coupled with Fentons reagent in a proton amplification reaction cascade that results in a highly amplified signal. A proton-sensitive dual-gated ion-sensitive field effect transistor (DG-ISFET) sensor was also developed for sensitive and accurate detection of the proton signal in H-ELISA. The DG-ISFET sensor comprises of a 128 × 128 array of 16,384 sensing transistors each with an individually addressable back gate to allow for a very high signal throughput and improved accuracy. We then demonstrated that the platform could detect C-reactive protein and immunoglobulin E down to concentrations of 12.5 and 125 pg/mL, respectively. We further showed that the platform is compatible with complex biological sample conditions such as human serum, suggesting that the platform is sufficiently robust for potential diagnostic applications.


IEEE Electron Device Letters | 1998

Transistor Characteristics with Ta O Gate Dielectric

Donggun Park; Qiang Lu; Tsu-Jae King; Chenming Hu; Alexander Kalnitsky; Sing-Pin Tay; Chia-Cheng Cheng


Archive | 2012

Cmos compatible biofet

Alexander Kalnitsky; Yi-Shao Liu; Kai-Chih Liang; Chia-Hua Chu; Chun-Ren Cheng; Chun-Wen Cheng


Archive | 2011

LOW GATE-LEAKAGE STRUCTURE AND METHOD FOR GALLIUM NITRIDE ENHANCEMENT MODE TRANSISTOR

Alexander Kalnitsky; Chih-Wen Hsiung; Chun Lin Tsai


Archive | 2010

Motion detection using capacitor having different work function materials

Alexander Kalnitsky; Fu-Lung Hsueh


IEEE Electron Device Letters | 2017

Digital Integrated Circuits on an E-Mode GaN Power HEMT Platform

Gaofei Tang; Alex Man Ho Kwan; Roy K. Y. Wong; Jiacheng Lei; R.-Y. Su; Fu-Wei Yao; Yu-Syuan Lin; J. L. Yu; Tom Tsai; H. C. Tuan; Alexander Kalnitsky; Kevin J. Chen


Archive | 2016

VERTICAL TRANSFER GATE STRUCTURE FOR A BACK-SIDE ILLUMINATION (BSI) COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR (CMOS) IMAGE SENSOR USING GLOBAL SHUTTER CAPTURE

Jhy-Jyi Sze; Alexander Kalnitsky; Yimin Huang

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Chenming Hu

University of California

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Qiang Lu

University of California

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Tsu-Jae King

University of California

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