Alexey Gutin

THz SPICE for Modeling Detectors and Nonquadratic Response at Large Input Signal

The THz SPICE model is capable of simulating field effect transistors (FETs) in a plasmonic mode of operation at frequencies far above the device cutoff frequency. The model uses a distributed RC or RLC network and is validated by comparison of the simulation results with our analytical model of the plasmonic detector, and with measured results. It also allows us to determine the operation regimes, where conventional SPICE models are still applicable. The applicability of this model for THz sensing applications is demonstrated by simulating the plasmonic THz FET sensor with on-chip amplifier.

Modeling Terahertz Plasmonic Si FETs With SPICE

As operating frequencies of Si FETs continue to grow, commercial circuit modeling tools must provide accurate simulations at very high frequencies with the ability to model plasmonic FETs in large and complex circuits. Traditional compact SPICE models used by commercial CAD tools model the channel resistance and capacitance and gate resistance as single lumped elements or use approximations to model the distributed nature of the FET channel. At high frequencies, these models become inaccurate and fail to model device physics properly. To describe plasmonic FETs, a THz SPICE model is developed for Si FETs. The THz SPICE model is validated experimentally to be in close agreement with measured results. The model is used to show predicted device response at different technology nodes.

Terahertz detection using on chip patch and dipole antenna-coupled GaAs High Electron Mobility Transistors

This paper presents high responsivity plasmonic terahertz (THz) power detectors operating at 0.3 THz. The detectors are implemented using 130 nm depletion mode InGaAs/GaAs pseudomorphic High Electron Mobility Transistors (pHEMT) with on chip patch and dipole antennas connected to the gate terminal. The measured absolute responsivity at room temperature is 7V/W, while the normalized responsivity with respect to the THz beam and physical antenna area is 8kV/W, with a noise equivalent power (NEP) of 9.1 pW/√(Hz). The paper also addresses the bias dependency of the signal to noise ratio (SNR), THz detector input impedance and the matching requirement for the connection between the antenna and input to the gate of the THz detector.

InP Double Heterojunction Bipolar Transistor for broadband terahertz detection and imaging systems

This paper presents terahertz detectors based on high performance 0.7-μm InP double heterojunction bipolar transistor (DHBT) technology and reports on the analysis of their voltage responsivity over a wide frequency range of the incoming terahertz radiation. The detectors operated without any spatial antennas to couple terahertz radiation to the device and have been characterized in the 0.25 - 3.1 THz range with the responsivities (normalized to 1 W radiant power) of 5 V/W and 200 μV/W measured at 0.35 THz and 3.11 THz, respectively. The InP DHBTs also performed as the imaging single-pixels at room temperature in the raster scanned transmission mode. A set of the sub-terahertz images of plant leaves suggest potential utility of InP DHBT detectors for terahertz imaging dedicated to non-invasive testing of plants.

Carry Chains for Ultra High-Speed SiGe HBT Adders

Adder structures utilizing SiGe Hetero-junction Bipolar Transistor (HBT) digital circuits are examined for use in high clock rate digital applications requiring high-speed integer arithmetic. A 4-gate deep test structure for 32-bit addition using a 210 GHz fT process has been experimentally verified to operate with 37.5 ps delay or 26.7 GHz speed. The paper documents a unique blend of CML and ECL circuit innovations, which is needed to obtain this result. The chip is estimated to have a power-delay product of 109 ps-W at a device temperature of 85°C . A low power design is shown to have a power-delay product of 48 ps-W at 21.7 GHz. Speed-power trade-offs are explored through pure ECL logic and varying current. Additionally, with next generation SiGe HBTs, this work shows that 40 GHz is achievable at slightly above room temperature.

New optical gating technique for detection of electric field waveforms with subpicosecond resolution.

The new optical gating technique uses a femtosecond optical laser pulses for the photoconductive detection of short pulses of terahertz (THz) radiation. This technique reproduces the shape of the THz pulse and after pulse plasmonic response of the two-dimensional electron gas in a short channel high electron mobility transistor (HEMT). The results are in excellent agreement with the electro-optic effect measurements and with the simulation results obtained in the frame of a two-dimensional hydrodynamic model. The femtosecond optical laser pulse time is delayed with respect to the THz pulse and generates a large concentration of the electron-hole pairs in the AlGaAs/InGaAs HEMT. This drastically increases the channel conductivity on the femtosecond scale and effectively shorts the device quenching the transistor response. The achieved time resolution is better than 250 femtoseconds and could be improved using shorter femtosecond laser pulses. The spatial resolution of this technique is on the order of tens of nanometers or even smaller. It could be applied for studying the electron transport in a variety of electronic devices ranging from silicon MOSFETs to heterostructure bipolar transistors.

Design of High-Speed Register Files Using SiGe HBT BiCMOS Technology

The time needed for processing serial code in programs has become the performance bottleneck of multicore computer systems according to Amdahls law. A high-speed clock rate processor is essential for processing this serial code. The register file is the core component in high-performance processors due to its direct impact on the cycle per instruction of the CPU. This brief presents the design of a high-speed register file used in high-clock-rate processors that use SiGe heterojunction bipolar transistor BiCMOS technology and current-mode logic-style circuits. The demonstrated register file is fabricated in IBM BiCMOS 0.13- μm technology and has a measured frequency of 18.4 GHz. The highest operational frequency has been simulated at 27 GHz using layout extracted simulation at 85 °C after adopting improved pipeline structures. Further advanced technology (8XP) can improve the speed or reduce the power consumption of this register file.

Response of plasmonic terahertz detector to large signals: theory and experiment

In the Dyakonov-Shur terahertz (THz) detector, nonlinearities in the plasma wave propagation in the conduction channel of a heterostructure High Electron Mobility Transistor (HEMT) lead to a constant source-to-drain voltage providing the detector output. For a small signal, the perturbation theory treatment shows that the response is proportional to the intensity of the radiation. The proportionality factor can have a resonant or a broad dependence on the signal frequency. For submicron HEMTs, the typical measured response falls within the range of 0.1 to 4.5 THz. The deviations from this relation have been studied and reported in the approximation of the local Ohm’s law and transmission line model for the non-resonant response. Here we present the results obtained with the hydrodynamic model using the electron plasma Navier-Stokes equation, thus fully accounting for the hydrodynamic non-linearity, the viscosity and pressure gradients in the detector response. The model is applicable to both resonant and broadband operations of the HEMT based plasmonic detectors. The relation between the electron channel density and gate voltage was modeled by the unified charge control model applicable both above and below the threshold voltage. The theoretical results are compared with the response measured in the short channel InGaAs HEMT and the analytical approximation. The THz source was operating at 1.63 THz and the response was measured at varying signal intensities. The response of the detector operated in the open drain mode was measured above and below the threshold. The theoretical and experimental results are in good agreement.

The dynamic range of THz broadband FET detectors

Field effect transistors are promising detectors of THz radiation. They operate at room temperatures have high responsivity, low noise equivalent power, and fast response time. However, their linearity (dynamic range) and possibility of their application in the domain of high power radiation has not been yet sufficiently studied. We have investigated room temperature field effect transistors, detection at frequencies from 0.3 to 3 THz with power up to 100 kW/cm2. Several types of HEMTs and MOSFETs operating in the broadband non resonant detection regime, have been investigated. To provide a wide range of incident THz radiation intensities we used continuous-wave and pulsed sources: backward oscillators, CO2 pumped methanol laser, free electron laser, NH3, D2O, and CH3F lasers. We find that the photoresponse of HEMTs and MOSFETs is linear in radiation intensity up to a several kW/cm2 and then it saturates. The onset of the saturation depends on the radiation frequency and the transistor type. The observed saturation behavior can not be explained by the existing theoretical model which predict a square root like dependence of the photoresponse. We tentatively attribute the unusual features of the photoresponse saturation observed at high intensities considering high electric field transport phenomena, e.g., electron heating and electron velocity saturation.

A 125-ps access, 4GHZ, 16Kb BiCMOS SRAM

A 128Kbit BiCMOS SRAM with a typical access time of 125ps was developed with 0.13um IBM Silicon Germanium BiCMOS technology[1]. The fast access time with moderate power dissipation has been achieved using following techniques: CML decoder, CML driver circuit, bipolar sense amplify. CMOS 6T memory cell is used to achieve the high packing density. The simulation demonstrates that this SRAM macro can achieve working frequency of 4GHZ. This Macro is especially useful for realizing ultrahigh speed, high density SRAMs which is used as cache in the super computing processor.