Alfred C. Ipri

Selective epitaxial growth for the fabrication of CMOS integrated circuits

A process is described for the fabrication of CMOS integrated circuits which combines the epitaxial lateral overgrowth (ELO) technique with the concept of selective epitaxy. The resulting epitaxial material is shown to have a low defect density. Transistors fabricated in the selective epitaxy are shown to have characteristics which are a function of the epitaxial deposition conditions, the substrate orientation and dopant concentration, and the epitaxial layer thickness. Minimum device leakage currents were 250 pA/µm of channel width for n-channel devices fabricated in a p-well and 1.0 pA/µm for devices fabricated on p-substrates. The higher leakage currents for devices fabricated in a well are believed to be a result of the narrow vertical spacing (0.3-0.5 µm) between the n+source-drain regions and the n+substrate.

Lambda diodes utilizing an enhancement-depletion CMOS/SOS process

A process is described for the simultaneous fabrication of enhancement and depletion mode, n-, and p-channel MOS/ SOS transistors necessitating six mask levels through metallization. The depletion-mode devices are actually deep depletion devices and an analysis of these structures when operated in a surface accumulation mode is presented. The enhancement devices are shown to have normal device characteristics with threshold voltages of less than 1.0 V. The depletion-mode devices also have normal characteristics with pinchoff values less than 1.0 V. Lambda diodes were fabricated from the depletion-mode devices which had peak current values of 5 µA at 0.5 V. In addition, a 16-bit memory array was fabricated comprised of all these structures which had an access time of 3 µs at 5.0 V.

Two-dimensional dynamic analysis of short-channel thin-film MOS transistors using a minicomputer

A computer program is described for simulating two-dimensional thin-film MOS transistors on a minicomputer. Data are presented showing the variation of internal carrier density with time until a steady-state condition is reached. These data show the formation of a drain-induced back channel whose conduction properties depend on the back-channel length and carrier mobility. For channel length below 2.0 µm, the two-dimensional steady-state drain current is shown to fit the expression I_{D}/W = \frac{\micro_{0}C_{0}}{L[1+(\micro_{0}/\upsilon_{s} V_{D}{L})^{2}]^{1/2}}(V_{G} - V_{T} - V_{D/2})V{D} for values of drain voltage below a specific saturation value (V_{DM}); and I_{D}/W = \frac{10^{-8)(V_{G} - V_{T})^{1/2}}{(T_{ox})^{1/2}L}.(V_{D} - V_{DM}) + I_{DM} for drain voltages above the saturation value.

Low-cost process for fabricating polysilicon transistors

A process for the fabrication of p-channel polysilicon MOS transistors is described. The process is compatible with the use of low-temperature glass substrates and replaces the use of ion implantation for the source/drain doping with in situ doped polysilicon. MOS transistors made with this process exhibit an on/off current ratio of 2.5*10/sup 5/, a mobility of 16 cm/sup 2//V-s, and a subthreshold slope of 1.3 V/decade. >

Fabrication of SOI CMOS over large-area continuous-oxide films formed using epitaxial lateral overgrowth techniques

The authors have developed techniques for producing thin, monocrystalline silicon films over large area continuous oxides using the epitaxial lateral overgrowth (ELO) approach and have investigated the electrical characteristics of CMOS devices fabricated in these films. A conventional ELO process using a growth-etchback technique to eliminate spurious nucleation was used to overgrow single-crystal silicon from seed regions over the oxide stripes. Silicon nitride was deposited and patterned with a mask which had an identical pattern to the first mask. After nitride etch, the original seed region was exposed. A partial silicon etch was performed and the wafers were then reoxidized. During this step an oxide was grown over the exposed seed region which subsequently coalesced with the initial oxide stripes, forming a continuous insulating region covered by stripes of single-crystal silicon. These formed the seed for a second ELO step that resulted in a continuous single-crystal silicon film over the underlying oxide. The transistors, fabricated in ELO material, exhibited electrical characteristics comparable to both SOS controls and to devices fabricated on SIMOX (silicon implanted with oxygen) wafers in the laboratory using an identical process. >