Alister Hamilton

Integrated pulse stream neural networks: results, issues, and pointers

Results from working analog VLSI implementations of two different pulse stream neural network forms are reported. The circuits are rendered relatively invariant to processing variations, and the problem of cascadability of synapses to form large systems is addressed. A strategy for interchip communication of large numbers of neural states has been implemented in silicon and results are presented. The circuits demonstrated confront many of the issues that blight massively parallel analog systems, and offer solutions.

Neuromorphic Systems: Engineering Silicon from Neurobiology

From the Publisher: Neuromorphic systems are implementations in silicon of sensory and neural systems whose architecture and design are based on neurobiology. This growing area proffers exciting possibilities, such as sensory systems that can compete with human senses and pattern recognition systems that can run in real time. The area is at the intersection of neurophysiology, computer science and electrical engineering. This book brings together recent developments in Europe and the US, so that researchers in both academia and industry can find out about the state of the art. As well as elementary material on what neuromorphic systems are and why they are growing in importance, the book contains details of current work. Them are articles on aspects of implementing sensory neuromorphic systems, as well as articles on neuromorphic hardware.

Palmo: Field Programmable Analogue and Mixed-Signal VLSI for Evolvable Hardware

This paper presents novel pulse based techniques initially intended to implement signal processing functions such as analogue and mixed-signal filters, data converters and amplitude modulators. Field programmable devices using these techniques have been implemented and used on a demonstration board to implement analogue and mixed-signal arrays. The rich mix of analogue and digital functionality provided by Palmo systems combined with the fact that they may accept random configuration bit streams makes them most attractive as platforms for evolvable hardware.

Combined smart chemFET/resistive sensor array

Here we describe a novel CMOS compatible gas sensor array based on a combined resistive/chemFET sensor cell. We have fabricated an array of 70 sensors with integrated drive, gain and baseline removal circuitry using an AMS 0.6 /spl mu/m CMOS process. The sensing materials are carbon black/polymer composite (CB) thin films, which have been previously reported to have good vapour-sensing properties. Different CB films have been deposited onto the sensor array and have been shown to respond differently to volatile organic compounds. This combined sensing element both reduces silicon area and, more importantly, measures different physical properties of the same gas sensitive material improving discrimination and giving more insight into the sensing mechanism.

Pulse stream VLSI neural networks

EPSILON, a large, working, VLSI device, demonstrates pulse stream methods in the wider context of analog neural networks. EPSILON uses dynamic weight storage techniques, but a nonvolatile alternative is desirable. To that end, we have developed an amorphous silicon memory, which we present in experiments incorporating the device in a modest pulse stream neural chip. We have also developed a target-based training algorithm, which we demonstrate in a prototype learning device using a realistic problem. Finally, we explore system-level problems in experiments with a second version of EPSILON in a small, autonomous robot.<<ETX>>

Pulse based signal processing: VLSI implementation of a Palmo filter

A new VLSI signal processing implementation technique is presented that uses a Pulse Width Modulation (PWM) signal representation combined with simple analogue processing to produce an electronically-programmable, process-tolerant filter building block. The principle benefits of this technique include full programmability, reconfigurability and testability which makes the technique an attractive proposition for VLSI. A 4th order Palmo filter is simulated and compared with the ideal response to demonstrate the validity of this novel approach. Preliminary results from a working chip demonstrate the operation of an analogue to PWM signal converter and the Palmo integrator.

Pulse-stream arithmetic in programmable neural networks

A pulse-stream signaling mechanism is described that is analogous to that found in natural neural systems. Previous work has resulted in the development of synthetic neural networks implemented as VLSI devices using pulse streams to represent neural states and a time-chopping technique to implement multiplication by synaptic weights. Synaptic weights are stored on-chip in digital memory. An alternative method for representing synaptic weights is described which uses dynamic storage capacitors to hold the charge proportional to synaptic weight. The capacitive storage devices are refreshed from off-chip digital RAM via a digital-to-analog converter. The presence, absence, and rate of pulse firing of the neuron are used to represent its state. Multiplication of a neuron state by a synaptic weight is performed by modifying the width of individual pulses passing through the synapse. A circuit that performs this function is described. The small synaptic circuit that results allows relatively high levels of integration in comparison to other programmable silicon neural forms.<<ETX>>

A Bio-Realistic Analog CMOS Cochlea Filter With High Tunability and Ultra-Steep Roll-Off

This paper presents the design and experimental results of a cochlea filter in analog very large scale integration (VLSI) which highly resembles physiologically measured response of the mammalian cochlea. The filter consists of three specialized sub-filter stages which respectively provide passive response in low frequencies, actively tunable response in mid-band frequencies and ultra-steep roll-off at transition frequencies from pass-band to stop-band. The sub-filters are implemented in balanced ladder topology using floating active inductors. Measured results from the fabricated chip show that wide range of mid-band tuning including gain tuning of over 20dB, Q factor tuning from 2 to 19 as well as the bio-realistic center frequency shift are achieved by adjusting only one circuit parameter. Besides, the filter has an ultra-steep roll-off reaching over 300 dB/dec. By changing biasing currents, the filter can be configured to operate with center frequencies from 31 Hz to 8 kHz. The filter is 9th order, consumes 59.5 ~ 90.0 μW power and occupies 0.9 mm2 chip area. A parallel bank of the proposed filter can be used as the front-end in hearing prosthesis devices, speech processors as well as other bio-inspired auditory systems owing to its bio-realistic behavior, low power consumption and small size.

An Asynchronous Spike Event Coding Scheme for Programmable Analog Arrays

This paper presents a spike event coding scheme for the communication of analog signals in programmable analog arrays. In the scheme presented here no events are transmitted when the signals are constant leading to low power dissipation and traffic reduction in analog arrays. The design process and the implementation of the scheme in a programmable array context are explained. The validation of the presented scheme is performed using a speech signal. Finally, we demonstrate how the event coded scheme can perform summation of analog signals without additional hardware.

Broadband antenna for RF energy scavenging system

This research work described in this paper is part of a larger project which aims to develop MEMS/NEMS based miniaturized RF energy scavenging devices. RF energy scavenging holds a promising future for generation of electrical power in order to charge electronics devices. The antenna system, as one of the most important parts in the energy scavenging system, has a significant influence on the overall system efficiency. In this paper, a broadband antenna is designed and modified for an RF energy scavenging system. Simulation results demonstrate that the modified antenna shows a wide bandwidth behavior based on S11 <;-10 dB, covering frequency ranges from 1 GHz to 4.5 GHz. The antenna gain, received power and radiation pattern are also simulated and presented.