S. Churcher
University of Edinburgh
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Featured researches published by S. Churcher.
IEEE Transactions on Neural Networks | 1992
Alister Hamilton; Alan Murray; D. J. Baxter; S. Churcher; H.M. Reekie; Lionel Tarassenko
Results from working analog VLSI implementations of two different pulse stream neural network forms are reported. The circuits are rendered relatively invariant to processing variations, and the problem of cascadability of synapses to form large systems is addressed. A strategy for interchip communication of large numbers of neural states has been implemented in silicon and results are presented. The circuits demonstrated confront many of the issues that blight massively parallel analog systems, and offer solutions.
international symposium on microarchitecture | 1994
Alan F. Murray; S. Churcher; Alister Hamilton; A.J. Homes; Geoffrey Bruce Jackson; H.M. Reekie; R.J. Woodburn
EPSILON, a large, working, VLSI device, demonstrates pulse stream methods in the wider context of analog neural networks. EPSILON uses dynamic weight storage techniques, but a nonvolatile alternative is desirable. To that end, we have developed an amorphous silicon memory, which we present in experiments incorporating the device in a modest pulse stream neural chip. We have also developed a target-based training algorithm, which we demonstrate in a prototype learning device using a realistic problem. Finally, we explore system-level problems in experiments with a second version of EPSILON in a small, autonomous robot.<<ETX>>
Archive | 1991
S. Churcher; Alan F. Murray; H. Martin Reekie
Neural networks are identified as an effective means of performing pattern recognition on image data. To take advantage of the parallelism inherent in such architectures, an analogue CMOS VLSI circuit has been developed. This device consists of novel pulse-firing neurons and synapses. The neurons are current controlled oscillators, which deplete their own input activity whenever a pulse is fired, in a manner similar to biological neurons. The synapses use neural voltage pulses to create pulsed current outputs. The magnitude of these outputs is determined by the synaptic weight voltage. When configured as a multi-layered perceptron, the neural circuit will facilitate the “real-tune” labelling of regions in segmented images.
Electronics Letters | 1993
S. Churcher; Alan F. Murray; H.M. Reekie
international symposium on circuits and systems | 1994
A. J. Holmes; S. Churcher; J. Hajto; Alan F. Murray; M. J. Rose
International Journal of Neural Systems | 1993
Alister Hamilton; S. Churcher; Peter J. Edwards; Geoffrey Bruce Jackson; Alan F. Murray; H. Martin Reekie
neural information processing systems | 1992
S. Churcher; D. J. Baxter; Alister Hamilton; Alan F. Murray; H. Martin Reekie
Archive | 1990
Alan F. Murray; D. J. Baxter; Z. F. Butler; S. Churcher; Alister Hamilton; H. M. Reekie; Lionel Tarassenko
neural information processing systems | 1994
A. J. Holmes; Alan F. Murray; S. Churcher; J. Hajto; M. J. Rose
Archive | 1991
Alan Murray; D. J. Baxter; Martin Reekie; S. Churcher; Alister Hamilton