Amir Eftekhar

Feature Extraction using First and Second Derivative Extrema (FSDE), for Real-time and Hardware-Efficient Spike Sorting

Next generation neural interfaces aspire to achieve real-time multi-channel systems by integrating spike sorting on chip to overcome limitations in communication channel capacity. The feasibility of this approach relies on developing highly efficient algorithms for feature extraction and clustering with the potential of low-power hardware implementation. We are proposing a feature extraction method, not requiring any calibration, based on first and second derivative features of the spike waveform. The accuracy and computational complexity of the proposed method are quantified and compared against commonly used feature extraction methods, through simulation across four datasets (with different single units) at multiple noise levels (ranging from 5 to 20% of the signal amplitude). The average classification error is shown to be below 7% with a computational complexity of 2N-3, where N is the number of sample points of each spike. Overall, this method presents a good trade-off between accuracy and computational complexity and is thus particularly well-suited for hardware-efficient implementation.

An Analogue Front-End Model for Developing Neural Spike Sorting Systems

In spike sorting systems, front-end electronics is a crucial pre-processing step that not only has a direct impact on detection and sorting accuracy, but also on power and silicon area. In this work, a behavioural front-end model is proposed to assess the impact of the design parameters (including signal-to-noise ratio, filter type/order, bandwidth, converter resolution/rate) on subsequent spike processing. Initial validation of the model is provided by applying a test stimulus to a hardware platform and comparing the measured circuit response to the expected from the behavioural model. Our model is then used to demonstrate the effect of the Analogue Front-End (AFE) on subsequent spike processing by testing established spike detection and sorting methods on a selection of systems reported in the literature. It is revealed that although these designs have a wide variation in design parameters (and thus also circuit complexity), the ultimate impact on spike processing performance is relatively low (10-15%). This can be used to inform the design of future systems to have an efficient AFE whilst also maintaining good processing performance.

Towards a next generation neural interface: Optimizing power, bandwidth and data quality

In this paper, we review the state-of-the-art in neural interface recording architectures. Through this we identify schemes which show the trade-off between data information quality (lossiness), computation (i.e. power and area requirements) and the number of channels. We further extend these tradeoffs by band-limiting the signal through reducing the front-end amplifier bandwidth. We therefore explore the possibility of band-limiting the spectral content of recorded neural signals (to save power) and investigate the effect this has on subsequent processing (spike detection accuracy). We identify the spike detection method most robust to such signals, optimize the threshold levels and modify this to exploit such a strategy.

Minimum requirements for accurate and efficient real-time on-chip spike sorting.

BACKGROUND Extracellular recordings are performed by inserting electrodes in the brain, relaying the signals to external power-demanding devices, where spikes are detected and sorted in order to identify the firing activity of different putative neurons. A main caveat of these recordings is the necessity of wires passing through the scalp and skin in order to connect intracortical electrodes to external amplifiers. The aim of this paper is to evaluate the feasibility of an implantable platform (i.e., a chip) with the capability to wirelessly transmit the neural signals and perform real-time on-site spike sorting. NEW METHOD We computationally modelled a two-stage implementation for online, robust, and efficient spike sorting. In the first stage, spikes are detected on-chip and streamed to an external computer where mean templates are created and sent back to the chip. In the second stage, spikes are sorted in real-time through template matching. RESULTS We evaluated this procedure using realistic simulations of extracellular recordings and describe a set of specifications that optimise performance while keeping to a minimum the signal requirements and the complexity of the calculations. COMPARISON WITH EXISTING METHODS A key bottleneck for the development of long-term BMIs is to find an inexpensive method for real-time spike sorting. Here, we simulated a solution to this problem that uses both offline and online processing of the data. CONCLUSIONS Hardware implementations of this method therefore enable low-power long-term wireless transmission of multiple site extracellular recordings, with application to wireless BMIs or closed-loop stimulation designs.

Ngram-Derived Pattern Recognition for the Detection and Prediction of Epileptic Seizures

This work presents a new method that combines symbol dynamics methodologies with an Ngram algorithm for the detection and prediction of epileptic seizures. The presented approach specifically applies Ngram-based pattern recognition, after data pre-processing, with similarity metrics, including the Hamming distance and Needlman-Wunsch algorithm, for identifying unique patterns within epochs of time. Pattern counts within each epoch are used as measures to determine seizure detection and prediction markers. Using 623 hours of intracranial electrocorticogram recordings from 21 patients containing a total of 87 seizures, the sensitivity and false prediction/detection rates of this method are quantified. Results are quantified using individual seizures within each case for training of thresholds and prediction time windows. The statistical significance of the predictive power is further investigated. We show that the method presented herein, has significant predictive power in up to 100% of temporal lobe cases, with sensitivities of up to 70–100% and low false predictions (dependant on training procedure). The cases of highest false predictions are found in the frontal origin with 0.31–0.61 false predictions per hour and with significance in 18 out of 21 cases. On average, a prediction sensitivity of 93.81% and false prediction rate of approximately 0.06 false predictions per hour are achieved in the best case scenario. This compares to previous work utilising the same data set that has shown sensitivities of up to 40–50% for a false prediction rate of less than 0.15/hour.

Empirical Mode Decomposition: Real-Time Implementation and Applications

This paper presents the development of the time-frequency technique, known as the Hilbert–Huang Transform (HHT) into a real-time analysis environment. By looking at the intrinsic elements of the transform we develop a novel strategy for computationally efficient and accurate real-time analysis. Test signals, as well as analysis on EEG and ECG signals for detecting relevant features are presented in support of our methodology. Additional unique insight is shown in some of the intrinsic elements of the algorithm, including some known errors in the use of the popular cubic spline method. Discussions of the primary design considerations and trade-offs are described throughout, aiming at a rounded view of what a real-time HHT implementation involves.

Frequency analysis of wireless accelerometer and EMG sensors data: Towards discrimination of normal and asymmetric walking pattern

This preliminary study reports on the combined use of wireless accelerometers and wireless EMG sensors for monitoring walking patterns. The sensor data was analyzed in frequency domain through FFT, PSD and time-frequency spectrogram analysis. Accelerometer spectra was found to shift towards lower frequencies (<;3 Hz) while EMG spectra of selected muscles shifted towards higher frequencies (>;50 Hz) during asymmetric walking. Median frequency was used to quantify the spectral shifts. The combined wireless accelerometer/EMG system showed potential for discrimination between the normal and asymmetric walking.

Hierarchical Adaptive Means (HAM) clustering for hardware-efficient, unsupervised and real-time spike sorting

This work presents a novel unsupervised algorithm for real-time adaptive clustering of neural spike data (spike sorting). The proposed Hierarchical Adaptive Means (HAM) clustering method combines centroid-based clustering with hierarchical cluster connectivity to classify incoming spikes using groups of clusters. It is described how the proposed method can adaptively track the incoming spike data without requiring any past history, iteration or training and autonomously determines the number of spike classes. Its performance (classification accuracy) has been tested using multiple datasets (both simulated and recorded) achieving a near-identical accuracy compared to k-means (using 10-iterations and provided with the number of spike classes). Also, its robustness in applying to different feature extraction methods has been demonstrated by achieving classification accuracies above 80% across multiple datasets. Last but crucially, its low complexity, that has been quantified through both memory and computation requirements makes this method hugely attractive for future hardware implementation.

Towards an inductively coupled power/data link for bondpad-less silicon chips

This paper explores the concept of developing a bondpad-less fully-integrated inductive link for power/data transfer between a CMOS Integrated Circuit (IC) and a PCB. A key feature of the implemented system is that it requires no off-chip components. The proposed chip uses a standard 0.35 µm process and occupies an area of 2.5mm×2.5mm and an on-chip inductor occupies an area of 1.5mm×1.5mm. At 900MHz, 9mW was designed to be provided to the chip (up to 22.5mW with a total efficiency of 5%). Binary Phase Shift Keying (BPSK) and Load shift keying (LSK) are used for the the PCB-to-chip and chip-to-PCB link respectively for half-duplex communication. An Injection-Locked-Oscillator-based BPSK demodulator is implemented on-chip to save power. The maximum data rate for the PCB-to-chip link is 10Mb/s. The estimated area of the circuitry is only 2mm2 which is 32% of the total chip area.

The WiNAM project: Neural data analysis with applications to epilespy

This work presents a novel algorithmic method based on an ngram approach and applies it ECoG and deep brain neural data for analysis of epileptic seizures. This is part of a project (WiNAM) to design an analysis framework suitable for analysing brain dynamical changes. By first exploring the ngram model and its traditional use we describe how to apply it to biological data for pattern recognition. We then use this methodology and apply it to neurological data to show good sensitivity to seizure onset. Through these tests we explore the parameters used when computing the ngram to evaluate what is needed to maintain this sensitivity. Additionally, we present the analysis framework (an online system) that is being developed to carry out the ngram analysis and database the data and results.