Amit Gore
Michigan State University
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Featured researches published by Amit Gore.
IEEE Transactions on Circuits and Systems | 2006
Amit Gore; Shantanu Chakrabartty; Sudeshna Pal; Evangelyn C. Alocilja
Rapid and accurate detection of pathogens using conductometric biosensors requires potentiostats that can measure small variations in conductance. In this paper, we present an architecture and implementation of a multichannel potentiostat array based on a novel semi-synchronous sigma-delta (SigmaDelta) analog-to-digital conversion algorithm. The algorithm combines continuous time SigmaDelta with time-encoding machines, and enables measurement of currents down to femtoampere range. A 3-mmtimes3-mm chip implementing a 42-channel potentiostat array has been prototyped in a 0.5-mum CMOS technology. Measured results demonstrate that the prototype can achieve 10 bits of resolution, with a sensitivity down to 50-fA current. The power consumption of the potentiostat has been measured to be 11 muW per channel for a sampling rate of 250 kHz. Experiments with a conductometric biosensor specific to Bacillus Cereus bacterium, demonstrate the ability of the potentiostat in identifying different concentration levels of the pathogen in a biological sample
IEEE Transactions on Circuits and Systems | 2010
Amit Gore; Amin Fazel; Shantanu Chakrabartty
Localization of acoustic sources using miniature microphone arrays poses a significant challenge due to fundamental limitations imposed by the physics of sound propagation. With sub-wavelength distances between the microphones, resolving acute localization cues become difficult due to precision artifacts. In this paper we propose a framework which overcomes this limitation by integrating signal-measurement (analog-to-digital conversion) with statistical learning (bearing estimation). At the core of the proposed approach is a min-max stochastic optimization of a regularized cost function that embeds manifold learning within ¿¿ modulation. As a result, the algorithm directly produces a quantized sequence of the bearing estimates whose precision can be improved asymptotically similar to a conventional ¿¿ modulators. In this paper we present a hardware implementation of a miniature acoustic source localizer which comprises of: (a) a common-mode canceling microphone array and (b) a ¿¿ integrated circuit which produces bearing parameters. The parameters are then combined in an estimation procedure that can achieve a linear range from 0°-90°. Measured results from a prototype fabricated in a 0.5 ¿m CMOS process demonstrate that the proposed localizer can reliably estimate the bearing of an acoustic source with a resolution less than 2° while consuming less than 75 ¿W of power.
IEEE Transactions on Circuits and Systems | 2010
Amit Gore; Shantanu Chakrabartty
In this paper, we present a framework for constructing ΣΔ learning algorithms and hardware that can identify and track low-dimensional manifolds embedded in a high-dimensional analog signal space. At the core of the proposed approach is a min-max stochastic optimization of a regularized cost function that combines machine learning with ΣΔ modulation. As a result, the algorithm not only produces a quantized sequence of the transformed analog signals but also a quantized representation of the transform itself. The framework is generic and can be extended to higher order ΣΔ modulators and for different signal transformations. In this paper, the ΣΔ learning is demonstrated for identifying linear compression manifolds, which can eliminate redundant AD conversion (ADC) paths. This improves the energy efficiency of the proposed architecture compared to a conventional multichannel data acquisition system. Measured results from a four channel prototype fabricated in a 0.5 μm CMOS process has been used to verify the energy efficiency of the ΣΔ learner and to demonstrate its real-time adaptation capabilities that are consistent with the theoretical and simulated results. One of the salient features of ΣΔ learning is its self-calibration property, whereby the performance remains unchanged even in the presence of computational artifacts (mismatch and nonlinearities). This property makes the proposed architecture ideal for implementing practical high-dimensional AD converters.
international conference of the ieee engineering in medicine and biology society | 2006
Amit Gore; Shantanu Chakrabartty; Sudeshna Pal; Evangelyn C. Alocilja
Rapid detection of pathogens using field deployable biosensors requires integrated sensing and data processing. Detection of low concentration of biological agents is possible using accurate and real-time signal characterization devices. This paper presents a multi-channel conductometric array that can detect and measure current up to femtoampere range. The architecture uses a novel semi-synchronous SigmaDelta modulation that allows measurement of ultra-small currents by using a hysteretic comparison technique. The architecture achieves higher energy efficiency over a conventional SigmaDelta by reducing the total switching cycles of the comparator. A 3 mm x 3 mm chip implementing a 42 channel potentiostat array has been prototyped in a 0.5 microm CMOS technology. Measured results show 10 bits of resolution, with a sensitivity of upto 50 fA of current. The power consumption of the potentiostat is 11 microW per channel at a sampling rate of 250 kHz. The multi-channel potentiostat has been integrated with a conductometric biosensor for field deployable applications. Results with a Bacillus Cereus based biosensor demonstrate the effectiveness of the potentiostat in characterizing different concentration levels of pathogens in realtime.
IEEE Transactions on Signal Processing | 2010
Amin Fazel; Amit Gore; Shantanu Chakrabartty
Many source separation algorithms fail to deliver robust performance when applied to signals recorded using high-density sensor arrays where the distance between sensor elements is much less than the wavelength of the signals. This can be attributed to limited dynamic range (determined by analog-to-digital conversion) of the sensor which is insufficient to overcome the artifacts due to large cross-channel redundancy, nonhomogeneous mixing, and high-dimensionality of the signal space. This paper proposes a novel framework that overcomes these limitations by integrating statistical learning directly with the signal measurement (analog-to-digital) process which enables high fidelity separation of linear instantaneous mixtures. At the core of the proposed approach is a min-max optimization of a regularized objective function that yields a sequence of quantized parameters which asymptotically tracks the statistics of the input signal. Experiments with synthetic and real recordings demonstrate significant and consistent performance improvements when the proposed approach is used as the analog-to-digital front-end to conventional source separation algorithms.
biomedical circuits and systems conference | 2007
Yang Liu; Amit Gore; Shantanu Chakrabartty; Evangelyn C. Alocilja
One of the important factors determining the sensitivity of any biosensing system is successful integration of bio- molecular transducers with peripheral signal processing circuitry. In this paper we present an architecture of a multi-array biosensor that integrates molecular bio-wires based immunosensor with a multi-channel potentiostat array. The biosensor operates by converting binding events between antigen and antibody into a measurable electrical signal using polyaniline nanowires as a transducer. The electrical signal is measured using a multichannel potentiostat where each channel comprises of a semi- synchronous SigmaDelta modulator. Measured results using a fabricated potentiostat array demonstrate sensitivity down to 50 femtoampere range which makes it ideal for detecting pathogens at low concentration levels. Experiments using the biosensor array specific to Bacillus Cereus bacterium validate the functionality of the platform in detecting the pathogen at different concentration levels.
international conference of the ieee engineering in medicine and biology society | 2006
Shantanu Chakrabartty; Amit Gore; Karim G. Oweiss
On chip signal compression is one of the key technologies driving development of energy efficient biotelemetry devices. In this paper, we describe a novel architecture for analog-to-digital (A/D) conversion that combines sigma delta conversion with the spatial data compression in a single module. The architecture called multiple-input multiple-output (MIMO) sigma-delta is based on a min-max gradient descent optimization of a regularized cost function that naturally leads to an A/D formulation. Experimental results with simulated and recorded multichannel data demonstrate the effectiveness of the proposed architecture to eliminate cross-channel redundancy in high density microelectrode data, thus superceding the performance of parallel independent data converters in terms of its energy efficiency
midwest symposium on circuits and systems | 2005
Amit Gore; Shantanu Chakrabartty
As the use of radio frequency identification (RFID) technology becomes widespread, one of the actively pursued research areas has been integration of smart sensors with RFID tags. These miniaturized devices when queried, transmit an identifier, subject to a specific condition of their environment. Applications of the sensors range from surveillance to biomedical systems. In this paper, we present a floating gate classifier that detects patterns of interest and enables or disables RF transmission on the tag. These classifiers consume minimal amount of energy and can be directly operated by scavenging power through inductive coupling. Applying online learning and calibration techniques to the classifier can compensate analog imperfections and mismatches in sensors. Results obtained from a prototype fabricated using standard 0.5mum CMOS process, are presented and the utility of learning on silicon is validated by demonstrated improvements in detection rates
international symposium on circuits and systems | 2009
Shantanu Chakrabartty; Amit Gore
For many recognition systems, the feature extraction unit forms the most computationally intensive and power consuming component. In this paper, we present a design of an analog-to-information converter that directly produces a pulse-encoded representation of linear predictive coded (LPC) features corresponding to an input analog signal. At the core of proposed design is a sigma-delta modulation procedure that is embedded within a learning step. Measured results from a fabricated prototype in a 0.5µm CMOS technology demonstrate the real-time functionality of the learner in extracting 6-dimensional online LPC features from input speech signal while consuming only 450 µW.
Archive | 2007
Shantanu Chakrabartty; Nizar Lajnef; Niell Elvin; Amit Gore