Shantanu Chakrabartty

A Multichannel Femtoampere-Sensitivity Potentiostat Array for Biosensing Applications

Rapid and accurate detection of pathogens using conductometric biosensors requires potentiostats that can measure small variations in conductance. In this paper, we present an architecture and implementation of a multichannel potentiostat array based on a novel semi-synchronous sigma-delta (SigmaDelta) analog-to-digital conversion algorithm. The algorithm combines continuous time SigmaDelta with time-encoding machines, and enables measurement of currents down to femtoampere range. A 3-mmtimes3-mm chip implementing a 42-channel potentiostat array has been prototyped in a 0.5-mum CMOS technology. Measured results demonstrate that the prototype can achieve 10 bits of resolution, with a sensitivity down to 50-fA current. The power consumption of the potentiostat has been measured to be 11 muW per channel for a sampling rate of 250 kHz. Experiments with a conductometric biosensor specific to Bacillus Cereus bacterium, demonstrate the ability of the potentiostat in identifying different concentration levels of the pathogen in a biological sample

Sub-Microwatt Analog VLSI Trainable Pattern Classifier

The design and implementation of an analog system-on-chip template-based pattern classifier for biometric signature verification at sub-microwatt power is presented. A programmable array of floating-gate subthreshold MOS translinear circuits matches input features with stored templates and combines the scores into category outputs. Subtractive normalization of the outputs by current-mode feedback produces confidence scores which are integrated for category selection. The classifier implements a support vector machine to select programming values from training samples. A two-step calibration procedure during programming alleviates offset and gain errors in the analog array. A 24-class, 14-input, 720-template classifier trained for speaker identification and fabricated on a 3 mmtimes3 mm chip in 0.5 mum CMOS delivers real-time recognition accuracy on par with floating-point emulation in software. At 40 classifications per second and 840 nW power, the processor attains a computational efficiency of 1.3times1012 multiply-accumulates per second per Watt of power

An Overview of Statistical Pattern Recognition Techniques for Speaker Verification

Even though the subject of speaker verification has been investigated for several decades, numerous challenges and new opportunities in robust recognition techniques are still being explored. In this overview paper we first provide a brief introduction to statistical pattern recognition techniques that are commonly used for speaker verification. The second part of the paper presents traditional and modern techniques which make real-world speaker verification systems robust in degradation due to the presence of ambient noise; channel variations, aging effects, and availability of limited training samples. The paper concludes with discussions on future trends and research opportunities in this area.

Calibration and Characterization of Self-Powered Floating-Gate Usage Monitor With Single Electron per Second Operational Limit

Self-powered monitoring refers to a signal processing technique where the computational power is harvested directly from the signal being monitored. In this paper, we present the design and calibration of a CMOS event counter for long-term, self-powered mechanical usage monitoring. The counter exploits a log-linear response of the hot-electron injection process on a floating-gate transistor when biased in weak-inversion. By configuring an array of floating-gate injectors to respond to different amplitude levels of the input signal, a complete analog processor has been designed that implements a level counting algorithm, which is widely used in mechanical usage monitoring. Measured results from a fabricated prototype in a 0.5-¿m CMOS process demonstrate that the processor can sense, store and compute over 105 usage cycles with an injection limit approaching one single electron per second and with a counting resolution of 5 bits. This paper also presents a calibration algorithm that is used for compensating the variations which arise due to device mismatch, power supply and temperature fluctuations. The maximum current rating of the fabricated analog processor has been measured to be less than 160 nA making it ideal for practical self-powered sensing applications.

A Piezo-Powered Floating-Gate Sensor Array for Long-Term Fatigue Monitoring in Biomechanical Implants

Measurement of the cumulative loading statistics experienced by an implant is essential for prediction of long-term fatigue failure. However, the total power that can be harvested using typical in-vivo strain levels is less than 1 muW. In this paper, we present a novel method for long-term, battery-less fatigue monitoring by integrating piezoelectric transduction with hot-electron injection on a floating-gate transistor array. Measured results from a fabricated prototype in a 0.5-mum CMOS process demonstrate that the array can sense, compute, and store loading statistics for over 70000 stress-strain cycles which can be extended to beyond 107 cycles. The measured response also shows excellent agreement with a theoretical model and the nominal power dissipation of the array has been measured to be less than 800 nW.

An Asynchronous Analog Self-Powered CMOS Sensor-Data-Logger With a 13.56 MHz RF Programming Interface

Design and implementation of a hybrid energy scavenging integrated circuit (IC) is presented which includes an asynchronous self-powered analog sensor-data-logger (SDL) unit and a 13.56 MHz radio-frequency (RF) programming interface. The SDL unit operates on an event-based analog self-powering technique where the energy for sensing, computation and non-volatile storage is harvested directly from the signal being sensed. By exploiting operational primitives inherent in a controlled hot-electron injection mechanism, the SDL unit eliminates the need for voltage regulation, energy storage, ADCs, MCUs and RAMs which are commonly used in traditional energy scavenging sensors. Remote programming and data interrogation of the SDL unit are performed using an integrated 13.56 MHz RF back-telemetry interface. The interface consists of a 6-instruction set digital command and control unit based on a token-ring architecture; a high-voltage generator for programming floating-gate (FG) transistors; and an RF front-end unit for communicating with an external reader. We show that the self-powered design is suitable for integration with electro-capacitive transducers (e.g., piezoelectric transducers) that can generate open-load voltages greater than 5 V and drive currents less than 200 nA. Measured results from prototypes fabricated in a 0.5-μ m standard CMOS process demonstrate that the IC consumes less than 90 nA in the self-powering mode and less than 200 μW of power in the RF-powering mode with an interrogation distance up to 40 mm. By combining self-powering and RF-powering, we show that the sensor experiences minimum down-time and can continuously monitor and record level-crossing statistics of different attributes of sensor signals.

Support vector machines for segmental minimum Bayes risk decoding of continuous speech

Segmental minimum Bayes risk (SMBR) decoding involves the refinement of the search space into sequences of small sets of confusable words. We describe the application of support vector machines (SVMs) as discriminative models for the refined search spaces. We show that SVMs, which in their basic formulation are binary classifiers of fixed dimensional observations, can be used for continuous speech recognition. We also study the use of GiniSVMs, which is a variant of the basic SVM. On a small vocabulary task, we show this two pass scheme outperforms MMI (maximum mutual information) trained HMMs. Using system combination we also obtain further improvements over discriminatively trained HMMs.

Rail-to-Rail, Linear Hot-Electron Injection Programming of Floating-Gate Voltage Bias Generators at 13-Bit Resolution

Hot-electron injection is widely used for accurate programming of on-chip floating-gate voltage and current references. The conventional programming approach involves adapting the duration and magnitude of the injection pulses based on a predictive model which is estimated by using measured data. However, varying the pulse-widths or amplitudes introduces nonlinearity in the injection process which complicates the modeling, calibration and programming procedure. In this paper, we propose a linear hot-electron injection technique which significantly simplifies the programming procedure, and can achieve programming accuracy greater than 13-b which is limited by the thermal noise from the injection process. The procedure employs an active feedback circuit which ensures that all the nonlinear factors affecting the hot-electron injection process are held constant, thus achieving a stable and controllable injection rate. Measured results using an array of floating-gate voltage reference prototyped in a 0.5-μm standard CMOS process demonstrate that the injection rates can be controlled from 0.1 to 4.1 V for the programmable voltage range. Using 50-ms injection pulses, we show that the average injection rate can be adapted from 6.9 to 250 μV/cycle.

Ginisupport vector machines for segmental minimum Bayes risk decoding of continuous speech

We describe the use of support vector machines (SVMs) for continuous speech recognition by incorporating them in segmental minimum Bayes risk decoding. Lattice cutting is used to convert the Automatic Speech Recognition search space into sequences of smaller recognition problems. SVMs are then trained as discriminative models over each of these problems and used in a rescoring framework. We pose the estimation of a posterior distribution over hypotheses in these regions of acoustic confusion as a logistic regression problem. We also show that GiniSVMs can be used as an approximation technique to estimate the parameters of the logistic regression problem. On a small vocabulary recognition task we show that the use of GiniSVMs can improve the performance of a well trained hidden Markov model system trained under the Maximum Mutual Information criterion. We also find that it is possible to derive reliable confidence scores over the GiniSVM hypotheses and that these can be used to good effect in hypothesis combination. We discuss the problems that we expect to encounter in extending this approach to large vocabulary continuous speech recognition and describe initial investigation of constrained estimation techniques to derive feature spaces for SVMs.

Spike sorting with support vector machines

Spike sorting of neural data from single electrode recordings is a hard problem in machine learning that relies on significant input by human experts. We approach the task of learning to detect and classify spike waveforms in additive noise using two stages of large margin kernel classification and probability regression. Controlled numerical experiments using spike and noise data extracted from neural recordings indicate significant improvements in detection and classification accuracy over linear amplitude- and template-based spike sorting techniques.