Andres Upegui

An FPGA platform for on-line topology exploration of spiking neural networks

Abstract In this paper we present a platform for evolving spiking neural networks on FPGAs. Embedded intelligent applications require both high performance, so as to exhibit real-time behavior, and flexibility, to cope with the adaptivity requirements. While hardware solutions offer performance, and software solutions offer flexibility, reconfigurable computing arises between these two types of solutions providing a trade-off between flexibility and performance. Our platform is described as a combination of three parts: a hardware substrate, a computing engine, and an adaptation mechanism. We present, also, results about the performance and synthesis of the neural network implementation on an FPGA.

Evolving hardware by dynamically reconfiguring xilinx FPGAs

Evolvable Hardware arises as a promising solution for automatic digital synthesis of digital and analog circuits. During the last decade, a special interest has been focused on evolving digital systems by directly mapping a chromosome on the FPGA configuration bitstream. This approach allowed a great degree of flexibility for evolving circuits. Nowadays, FPGAs routing scheme does not allow doing it in such flexible and safe way, so additional constraints must be introduced. In this paper we summarize three techniques for performing hardware evolution by exploiting the capacities of Virtex families. Among our proposals there are high and low level approaches, and coarse and fine grained components. A modular based evolution, with pre-placed and routed components, provides a coarse grain approach. Two techniques for directly modifying LUT contents on hard macros provide a fine grained evolution. Finally, integrating both approaches, coarse and fine grain, provides a more general and powerful framework.

The Perplexus bio-inspired reconfigurable circuit

This paper introduces the ubichip, a custom reconfigurable electronic device capable of implementing bio- inspired circuits featuring growth, learning, and evolution. The ubichip is developed in the framework of Perplexus, a European project that aims to develop a scalable hardware platform made of bio-inspired custom reconfigurable devices for simulating large-scale complex systems. In this paper, we describe the configurability and architectural mechanisms that will allow the implementation of evolv- able and developmental cellular and neural systems in an efficient way. These mechanisms are dynamic routing, self- reconfiguration, and a neural-friendly logic cells architecture.

Exploring adaptive locomotion with YaMoR, a novel autonomous modular robot with Bluetooth interface

Purpose – This paper aims to present a novel modular robot that provides a flexible framework for exploring adaptive locomotion.Design/methodology/approach – A new modular robot is presented called YaMoR (for “Yet another Modular Robot”). Each YaMoR module contains an FPGA and a microcontroller supporting a wide range of control strategies and high computational power. The Bluetooth interface included in each YaMoR module allows wireless communication between the modules and controlling the robot from a PC. A control software called Bluemove was developed and implemented that allows easy testing of the capabilities for locomotion of a large variety of robot configurations.Findings – With the help of the control software called Bluemove, different configurations of the YaMoR modules were tested like a wheel, caterpillar or configurations with limbs and their capabilities for locomotion.Originality/value – This paper demonstrates that modular robots can act as a powerful framework for exploring locomotion o...

YaMoR and Bluemove -- an autonomous modular robot with Bluetooth interface for exploring adaptive locomotion

Modular robots offer a robust and flexible framework for exploring adaptive locomotion control. They allow assembling robots of different types e.g. snakelike robots, robots with limbs, and many other different shapes. In this paper we present a new cheap modular robot called YaMoR (for “Yet another Modular Robot”). Each YaMoR module contains an FPGA and a microcontroller supporting a wide range of control strategies and high computational power. The Bluetooth interface included in each YaMoR module allows wireless communication between the modules and controlling the robot from a PC. With the help of our control software called Bluemove, we tested different configurations of our YaMoR robots like a wheel, caterpillar or configurations with limbs and their capabilities for locomotion.

PERPLEXUS: Pervasive Computing Framework for Modeling Complex Virtually-Unbounded Systems

This paper introduces Perplexus, a European project that aims to develop a scalable hardware platform made of custom reconfigurable devices endowed with bio-inspired capabilities. This platform will enable the simulation of large-scale complex systems and the study of emergent complex behaviors in a virtually unbounded wireless network of computing modules. The final infrastructure will be used as a simulation tool for three applications: neurobiological modeling, culture dissemination modeling, and cooperative collective robotics. The Perplexus platform will provide a novel modeling framework thanks to the pervasive nature of the hardware platform, its bio-inspired capabilities, its strong interaction with the environment, and its dynamic topology.

A dynamically-reconfigurable FPGA platform for evolving fuzzy systems

In this contribution, we describe a hardware platform for evolving a fuzzy system by using Fuzzy CoCo — a cooperative coevolutionary methodology for fuzzy system design — in order to speed up both evolution and execution. Reconfigurable hardware arises between hardware and software solutions providing a trade-off between flexibility and performance. We present an architecture that exploits the dynamic partial reconfiguration capabilities of recent FPGAs so as to provide adaptation at two different levels: major structural changes and fuzzy parameter tuning.

Particle Swarm Optimization with Discrete Recombination: An Online Optimizer for Evolvable Hardware

Self-reconfigurable adaptive systems have the possibility of adapting their own hardware configuration. This feature provides enhanced performance and flexibility, reflected in computational cost reductions. Self-reconfigurable adaptation requires powerful optimization algorithms in order to search in a space of possible hardware configurations. If such algorithms are to be implemented on chip, they must also be as simple as possible, so the best performance can be achieved with the less cost in terms of logic resources, convergence speed, and power consumption. This paper presents hybrid bio-inspired optimization technique that introduces the concept of discrete recombination in a particle swarm optimizer, obtaining a simple and powerful algorithm, well suited for embedded applications. The proposed algorithm is validated using standard benchmark functions and used for training a neural network-based adaptive equalizer for communications systems

Self-Reconfigurable Pervasive Platform for Cryptographic Application

The complexity exhibited by pervasive systems is constantly increasing. Customer electronics devices provide day to day a larger amount of functionalities. A common approach for guaranteeing high performance is to include specialized coprocessor units. However, these systems lack flexibility, since one must define, in advance, the coprocessor functionality. A solution to this problem is to use run-time reconfigurable coprocessors, exploiting the advantages of hardware while keeping a flexible platform. In this paper, we describe a self-reconfigurable pervasive platform containing a dynamically reconfigurable cryptographic coprocessor. As case-study, we consider three ciphering algorithms and we compare the performance of the coprocessor against a full-software implementation. The number of ciphering algorithms can be infinitely extended using a remote server

A functional spiking neuron hardware oriented model

This work introduces a new class of neuro-fuzzy models called Hierarchical Neuro-Fuzzy BSP Systems (HNFB). These models employ the BSP partitioning (Binary Space Partitioning) of the input space and has been developed in order to bypass the traditional drawbacks of neuro-fuzzy systems: the reduced number of allowed inputs and the poor capacity to create their own structure. First the paper briefly introduces the HNFB model based on supervised learning algorithm. Then it details the RL_HNFB model, which is a hierarchical neuro-fuzzy system with reinforcement learning process. The RL_HNFB model was evaluated in a benchmark application - mountain car - yielding good performance when compared with different reinforcement learning models.