Andrew C. Alduino
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Featured researches published by Andrew C. Alduino.
Integrated Photonics Research, Silicon and Nanophotonics and Photonics in Switching (2010), paper PDIWI5 | 2010
Andrew C. Alduino; Ling Liao; Richard Jones; Mike Morse; Brian H. Kim; Wei-Zen Lo; Juthika Basak; Brian R. Koch; Hai-Feng Liu; Haisheng Rong; Matthew N. Sysak; Christine Krause; Rushdy Saba; Dror Lazar; Lior Horwitz; Roi Bar; Stas Litski; Ansheng Liu; Kevin Sullivan; Olufemi I. Dosunmu; Neil Na; Tao Yin; Frederick Haubensack; I-Wei Hsieh; John Heck; Robert Beatty; Hyundai Park; Jock Bovington; Simon Lee; Hat Nguyen
The demonstration of a 4λ×10Gbps Silicon Photonics CWDM link integrating all optical components, electronics and packaging technologies required for system integration is reported. Further demonstration of the link operating at 50Gbps, 4λ×12.5Gbps, is also shown.
ieee hot chips symposium | 2010
Andrew C. Alduino
This article consists of a collection of slides from the authors conference presentation on the demonstration of a high speed, 4-channel integrated silicon photonics WDM link wiht hybrid silicon lasers. Some of the specific topics discussed include: presents an overview of these technologies and reports on the platforms they support; testing results; and WDM silicon photonics links and link testing results.
Proceedings of SPIE, the International Society for Optical Engineering | 2008
Andrew C. Alduino; Hai-Feng Liu; Abazar Mireshghi; Henning Braunisch; Christine Krause; Mario J. Paniccia
The package integration of optical components with electronic integrated circuits (ICs) for optical interconnects is a subject of much debate and will, to a large extent, determine the performance of the optical interconnect system. In this paper we examine the challenges of incorporating optical interconnects into a computer system; specifically we cover several ways to integrate the optical components with a central processing unit (CPU) or chipset. Critical performance parameters such as the supported distance, power consumption and the achievable bandwidth are all impacted by the electrical integration between the IC and the optical components. Additional electrical link issues which also have a large impact on the performance of the link will be discussed as well; these include protocol related issues as well as signal integrity concerns, such as the jitter budget. We will also discuss the performance of some of the competing electrical technologies in order to provide a better understanding of the implementation challenge facing the developers of optical interconnect technology. Rack to rack communications are quickly moving to optical links, board to board communication is the next step and chip to chip communication is still further out as the electrical solutions for this topology have a great deal of headroom.
Nature Photonics | 2007
Andrew C. Alduino; Mario J. Paniccia
Archive | 2005
Andrew C. Alduino; Mario J. Paniccia
Archive | 2006
Daoqiang Lu; Andrew C. Alduino; Henning Braunisch
conference on lasers and electro-optics | 2011
Brian R. Koch; Andrew C. Alduino; Ling Liao; Richard Jones; Mike Morse; Brian H. Kim; Wei-Zen Lo; Juthika Basak; Hai-Feng Liu; Haisheng Rong; Matthew N. Sysak; Christine Krause; Rushdy Saba; Dror Lazar; Lior Horwitz; Roi Bar; Stas Litski; Ansheng Liu; Kevin Sullivan; Olufemi I. Dosunmu; Neil Na; Tao Yin; Frederick Haubensack; I-Wei Hsieh; John Heck; Robert Beatty; Jock Bovington; Mario J. Paniccia
Archive | 2001
Ansheng Liu; Mario J. Paniccia; Remus Nicolaescu; Andrew C. Alduino; Ling Liao
Archive | 2014
Donald L. Faw; Uri V. Cummings; Terrence Trausch; Daniel P. Daly; Andrew C. Alduino
Archive | 2003
Dean Samara-Rubio; Andrew C. Alduino; Christina A. Frost