Christine Krause

Demonstration of a High Speed 4-Channel Integrated Silicon Photonics WDM Link with Hybrid Silicon Lasers

The demonstration of a 4λ×10Gbps Silicon Photonics CWDM link integrating all optical components, electronics and packaging technologies required for system integration is reported. Further demonstration of the link operating at 50Gbps, 4λ×12.5Gbps, is also shown.

2×25.625G Low power optical IC for thunderbolt optical cable technology

This paper presents low power, 2×25.625Gb/s optical transmitter and receiver ICs for Intel Thunderbolt optical cable technology which is designed to connect electronic devices with the intension to become the standardized optical interconnect. Same circuit with four channels (4×25.625Gb/s) can be used in 100G data center optical communication. Each transmitter channel consumes 68mW, receiver channel consumes 78mW. Total power consumption is 146mW for each 25.625Gb/s optical link, which gives 5.69mW/Gb/s. ICs are implemented on BiCMOS process, each two channel IC occupies a die area of 0.884mm × 1.226mm. The ICs have lowest power consumption and smallest die area in industry.

Thunderbolt interconnect – comparing optical and copper approaches

Thunderbolt Interconnect Technology has adopted both copper and optical cables. One single cable can support two bi-directional signal lanes at a data rate of 2x20.625 Gb/s, which is driven by demand of 4K video. Future 8K video and Virtual Reality (VR) will push the bandwidth requirement even higher. Form factor, link distance, usage model and heat dissipation are all placed into design consideration. Key technologies developed to enable this high data rate consumer cable are discussed, such as robust copper and optical cables, miniature optical engine, thermal design and 2x20.625Gb/s low power integrated circuits for VCSEL-based optical link. Copper and optical interconnect technologies are compared from the perspective of cost, power, form factor, and scalability. Total power consumption is 146mW for each 25.78Gb/s optical link, which gives 5.69mW/Gb/s. Among the commercially available optical ICs we evaluated at 25.78 Gb/s, this work has lowest power consumption and smallest die area in industry.

Thunderbolt Interconnect—Opitcal and Copper

Thunderbolt interconnect technology has adopted copper and optical cables. Single cable can support 2 × 20 Gb/s data rate, which is driven by 4K video. Future 8K video and virtual reality will push the bandwidth requirement even higher. Key technologies developed to enable this high data rate for consumer electronics are discussed, such as robust copper and optical cables, miniature optical engine, and 2 × 25.625 Gb/s low power integrated circuits for vertical cavity surface emitting laser based optical link. Copper and optical interconnect technologies are compared on the basis of cost, power, form factor, and scalability. Same circuit with four channels (4 × 25.625 Gb/s) can be used in 100G data center optical interconnect. Total power consumption is 146 mW for each 25.625 Gb/s optical link, which gives 5.69 mW/Gb/s. Among the commercially available optical ICs we evaluated at 25 Gb/s, this work has lowest power consumption and smallest die area in industry.

2×25G low power optical IC for Thunderbolt optical cable technology

This paper presents low power, 2×25.625Gb/s optical transmitter and receiver ICs for Intel Thunderbolt optical cable technology which is designed to connect electronic devices with the intension to become the standardized optical interconnect. Same circuit with four channels (4×25.625Gb/s) can be used in 100G data center optical interconnect. Each transmitter channel consumes 68mW, receiver channel consumes 78mW. Total power consumption is 146mW for each 25.625Gb/s optical link, which gives 5.69mW/Gb/s. ICs are implemented on BiCMOS process, each two channel IC occupies a die area of 0.884mm × 1.226mm. The ICs have lowest power consumption and smallest die area in industry.

Integration challenges for optical inteconnects

The package integration of optical components with electronic integrated circuits (ICs) for optical interconnects is a subject of much debate and will, to a large extent, determine the performance of the optical interconnect system. In this paper we examine the challenges of incorporating optical interconnects into a computer system; specifically we cover several ways to integrate the optical components with a central processing unit (CPU) or chipset. Critical performance parameters such as the supported distance, power consumption and the achievable bandwidth are all impacted by the electrical integration between the IC and the optical components. Additional electrical link issues which also have a large impact on the performance of the link will be discussed as well; these include protocol related issues as well as signal integrity concerns, such as the jitter budget. We will also discuss the performance of some of the competing electrical technologies in order to provide a better understanding of the implementation challenge facing the developers of optical interconnect technology. Rack to rack communications are quickly moving to optical links, board to board communication is the next step and chip to chip communication is still further out as the electrical solutions for this topology have a great deal of headroom.