Andrew Findlay

The Present Status and Recent Advancements in Corona-Kelvin Non-Contact Electrical Metrology of Dielectrics for IC-Manufacturing

Non-contact electrical metrology offers a fast and cost saving monitoring of dielectrics in IC manufacturing process. This corona-Kelvin measuring technique has entered the maturity stage with about 400 tools installed in silicon IC-fabs. We discuss recent advancements that broaden the spectrum of monitoring parameters and enhance the precision of these measurements. We also discuss the current ongoing extension of corona-Kelvin metrology to the micro scale measurement on sites as small as 30µm x 30µm. This opens new possibilities for non-contact electrical testing of product wafers, rather than expensive process monitor wafers. Micro-measurement is illustrated using flash memory ONO structures and corona induced programming and erasing.

Multifunction metrology platform for photovoltaics

Advanced characterization for PV is a complex process that must address bulk defects, interfaces, passivation, and degradation phenomena. It requires not only appropriate measurement techniques, but also a coupling of measurements with treatments altering defect/interface activity. Preferably, the metrology should be noncontact and cost effective. The purpose of this work was to provide such multifunction wafer scale characterization capability for silicon PV. In this paper we describe a multifunction metrology platform. Example applications are given that illustrate the importance of sequenced measurements for 1 — monitoring of the light induced degradation in PV wafers and solar cells; 2 — correlation between interface trap density and surface recombination and the role of surface barrier, and 3 — monitoring of the field-effect potential emitter passivation.

Emitter passivation by charge injection

We have discovered a new means for engineering of emitter recombination and saturation current, J0, using corona controlled charge injection to deep dielectric traps near the interfacial region. The injected charge remains at the interface after removal of the corona charge from the dielectric surface, creating a highly desired low emitter recombination state. The effect is demonstrated for p+ emitters on n-substrates, passivated with a SiO2/SiNx stack. The desired charge injection is created by positive corona charging that causes electron tunneling through the interfacial SiO2 film to traps in the SiNx. It should be noted that passivation by injection requires opposite corona polarity to that used in past field-effect passivation studies. The new phenomenon may be of importance, not only for fundamental understanding, but conceivably, also as a means of controlling the charge in the next generation of advanced cells employing dielectric stacks for emitter passivation.

Inline PL Inspection and Advanced Offline Evaluation of Passivation Defects, Charge and Interfaces

Recently introduced techniques for whole wafer mapping and imaging create new possibilities for root cause analysis of emitter passivation defects. Inline compatible PL imaging identifies such defects as localized regions with increased emitter saturation current and reduced implied open circuit voltage. Advanced offline evaluation of defective areas can be then performed with multiparameter noncontact measurements capable to establish the role of surface recombination, the interface trap density, or the dielectric charge that controls the field-effect passivation. The relevant novel metrologies are discussed and are illustrated using examples of advanced silicon passivation by dielectric films and by a-Si heterojunction structures.

Integrated electrical and optical characterization of large area thin film photovoltaic materials

In thin film photovoltaic manufacturing, a number of different technologies are now used on an industrial scale: silicon-based thin films, CIS/CIGS-based thin films, CdTe-based films and other, more exotic materials and structures. Both during research and production control, there is a need for suitable characterization methods which can be applied directly to the panels in production. In this paper we present a range of advanced electrical and optical metrology techniques suitable for such thin film characterization. These measurements utilize a number of non-contact, non-destructive probes to determine material properties, and can be configured in a single flexible platform, to handle the large area substrates used in thin film production. We also present significant improvements achieved in the spectrally resolved haze and transmission measurements, where the improvement is the creation of an optical setup with a suitable integration sphere that enables these measurements without the usual need to measure a reference sample before the actual sample qualification, thus maintaining the advantages of an integrating sphere but reducing usual measurement time.

Surface Voltage and μPCD Mapping of Defect in Epitaxial SiC

Kelvin-probe surface voltage mapping, SVM, on epitaxial SiC, charged with corona into deep depletion, reveals SV defects manifested as spots with decreased surface voltage. For 150μm thick epi-layer, SV defects coincide with low carrier lifetime spots revealed by microwave detected photoconductance decay, μPCD. In the photoluminescence image, these defects are seen as triangular dark spots, described in literature as stacking-fault related triangular defects. For thin epi-layers (2.2μm), defects are visible only in SVM. In this case, high resolution SVM performed with Kelvin Force Microscopy identifies a triangular defect shape. Two mechanisms are proposed, accounting for SV defects. For high intensity defects exhibiting large magnitude fast decreasing voltage, the probable mechanism is defect related leakage; causing neutralization of corona surface ions. Low intensity defects can be explained considering deep level emission. The latter mechanism has been investigated using SV transient and spectral analysis analogous to isothermal DLTS and Laplace DLTS.

Non-Visual Defect Monitoring with Surface Voltage Mapping: Application for Semiconductor IC and PV Technology

Non Visual Defects (NVD) is a category of defects that cause electrical failures but are not detected with visual wafer inspection tools. Our approach for NVD detection is based on the Kelvin probe surface voltage mapping technique. The detection of defects is enhanced using field-effect created in a non-contact manner by corona charge deposition on the surface of semiconductor. Precise defect location is accomplished with surface voltage gradient magnitude mapping that enhances delineation of defects. Detected defects are characterized locally using the corona-voltage technique or isothermal voltage transient decay analysis. Presented examples include: dielectric charge and interfacial defect mapping on 300mm Si wafers; deep level emission mapping on epitaxial SiC and mobile ion mapping in Si solar cells.

Experimental study on the role of parameters affecting surface recombination and emitter passivation

A multifunction metrology platform for silicon photovoltaics introduced about 3 years ago has helped generate experimental data demonstrating the importance of different electrical parameters that affect the surface recombination and corresponding passivation of PV emitters for advanced solar cells. In this paper we outline unique capabilities provided by mapping of multiple electrical properties. Interface trap density data are presented for Si passivated with Al2O3 and for a-Si/SiNx heterointerfaces. Using examples of corresponding multi-parameter data it is also shown that surface recombination can be increased or decreased depending on the value of the silicon space charge barrier, interface trapped charge and dielectric charge. For emitter structures the latter effect determines the effectiveness of field effect passivation and the value of the emitter saturation current, J0. The results reviewed in this paper illustrate potential paths to cell efficiency improvements by elimination of defective wafer areas with high Dit or with dielectric charge values away from low J0 field effect saturation. In this respect, the wafer mapping approach offers significant practical advantages as compared to a study involving multi-sample preparation and single point measurements.

Unified Lifetime measurement for silicon PV

We present a unified lifetime measurement approach that enables self-consistent parameter-free determination of two lifetimes most frequently used in solar cell manufacturing, i.e. the excess carrier decay lifetime, τ_eff.d and the quasi steady-state effective lifetime, τ_eff. The approach uses the quasi-steady-state microwave detected photoconductance decay (QSS-μPCD) technique, whereby a small perturbation laser pulse excitation is imposed on a steady-state carrier excitation up to 25 suns. Quality of decay control, QDC, is a novel element critical for reliable measurement of τ_eff.d. It enables precise tuning of experimental conditions to achieve practically ideal mono-exponential decay conditions. Once the illumination characteristics of τ_eff.d are determined, the integration procedure of Schuurmans et.al. (1997) is used to determine the corresponding steady-state effective lifetime, τ_eff. Results correlate very well with QSSPC. Neither the measurement of τ_eff.d, nor the integration requires any wafer parameters, therefore, the determination of both lifetimes shall be considered a “parameter free” method.

Recent Advancement in Charge and Photo-Assisted Non-Contact Electrical Characterization of SiC, GaN, and AlGaN/GaN HEMT

The charge-based corona-Kelvin noncontact metrology, originally developed for Si IC fabrication, has recently been extended to wide energy gap semiconductors. We discuss principles of this extension and key applications, namely: high precision dopant measurement on SiC and GaN; two-dimensional electron gas characterization in AlGaN/GaN HEMT structures; interface and dielectric characterization on epi-layers with SiO2, SiN and Al2O3; comprehensive interfacial instability characterization of oxidized SiC; and whole wafer mapping of defects with a charge-assisted surface voltage technique. This powerful set of measurements is performed without fabrication of any test structures or electrical contact. Corresponding commercial tools are currently being introduced. Based on the historical example of silicon IC, we believe that this approach shall offer enhanced testing for research and for manufacturing process control with reduced cost and fast data feedback benefiting the wide-bandgap device technology.