Andrew H. Loomis

Soft-X-ray CCD imagers for AXAF

We describe the key features and performance data of a 1024/spl times/1026-pixel frame-transfer imager for use as a soft-X-ray detector on the NASA X-ray observatory Advanced X-ray Astrophysics Facility (AXAF). The four-port device features a floating-diffusion output circuit with a responsivity of 20 /spl mu/V/e/sup -/ and noise of about 2 e/sup -/ at a 100-kHz data rate. Techniques for achieving the low sense-node capacitance of 5 fF are described. The CCD is fabricated on high-resistivity p-type silicon for deep depletion and includes narrow potential troughs for transfer inefficiencies of around 10/sup -7/. To achieve good sensitivity at energies below 1 keV, we have developed a back-illumination process that features low recombination losses at the back surface and has produced quantum efficiencies of about 0.7 at 277 eV (carbon K/spl alpha/).

CCD soft-X-ray detectors with improved high- and low-energy performance

We describe results from recent efforts to enhance the performance of CCDs to both low- and high-energy soft a rays. For improved low-energy (E<500 eV) sensitivity we show that a low-temperature surface treatment on back-illuminated devices results in generally better performance than that achieved on devices flown on Chandra, which had a more process-intensive high-temperature treatment. For improved high-energy response we describe a design approach for MOS CCDs that allows high substrate biases for deep depletion (>160 /spl mu/m) and thus improved x-ray detection for E>5 keV.

Large-Area Back-Illuminated CCD Imager Development

We describe recent work in the area of large, back-illuminated CCD imagers at M.I.T. Lincoln Laboratory as well as new technology applicable to astronomy. We completed in 1995 the development of a 2560 x 1960-pixel frame-transfer imager that filled a 100-mm wafer and several back-illuminated versions of this device were completed. More recently we have begun the development, in collaboration with the U. of Hawaii, of a three-side abuttable 2k x 4k CCD for a multi-chip focal plane. In the unused chord area of the wafer layout, we added test imagers as development vehicles for blooming control and for the demonstration of a CCD that is capable of charge transfer in all four directions. We expect the latter to find application as an electronic means of performing tip-tilt correction to compensate for atmospheric turbulence.

High-speed, electronically shuttered solid-state imager technology (invited)

Electronically shuttered solid-state imagers are being developed for high-speed imaging applications. A 5 cm×5 cm, 512×512-element, multiframe charge-coupled device (CCD) imager has been fabricated for the Los Alamos National Laboratory DARHT facility that collects four sequential image frames at megahertz rates. To operate at fast frame rates with high sensitivity, the imager uses an electronic shutter technology designed for back-illuminated CCDs. The design concept and test results are described for the burst-frame-rate imager. Also discussed is an evolving solid-state imager technology that has interesting characteristics for creating large-format x-ray detectors with short integration times (100 ps to 1 ns). Proposed device architectures use CMOS technology for high speed sampling (tens of picoseconds transistor switching times). Techniques for parallel clock distribution, that triggers the sampling of x-ray photoelectrons, will be described that exploit features of CMOS technology.

Geiger-mode quad-cell array for adaptive optics

We report an array of Shack-Hartmann wavefront sensors using high-fill-factor Geiger-mode avalanche detector quad cells hybridized to all-digital CMOS counting circuits. The absence of readout noise facilitates fast wavefront sensing at low light levels.

Low dark current, back-illuminated charge coupled devices

Dark current for back-illuminated (BI) charge-coupled-device (CCD) imagers at Lincoln Laboratory has historically been higher than for front-illuminated (FI) detectors. This is presumably due to high concentrations of unpassivated dangling bonds at or near the thinned back surface caused by wafer thinning, inadequate passivation and low quality native oxide growth. The high dark current has meant that the CCDs must be substantially cooled to be comparable to FI devices. The dark current comprises three components: frontside surface-state, bulk, and back surface. We have developed a backside passivation process that significantly reduces the dark current of BI CCDs. The BI imagers are passivated using molecular beam epitaxy (MBE) to grow a thin heavily boron-doped layer, followed by an annealing step in hydrogen. The frontside surface state component can be suppressed using surface inversion, where clock dithering reduces the frontside dark current below the bulk. This work uses surface inversion, clock dithering and comparison between FI and BI imagers as tools to determine the dark current from each of the components. MBE passivated devices, when used with clock dithering, have dark current reduced by a factor of one hundred relative to ion-implant/laser annealed devices, with measured values as low as 10-14 pA/cm2 at 20°C.

Orthogonal transfer arrays for the Pan-STARRS gigapixel camera

Recent development efforts on the orthogonal transfer array (OTA) for the Pan-STARRS gigapixel camera 1 (GPC1) are described. A redesign of the prototype OTAs has been completed, and fabrication and packaging of the devices for the GPC1 are nearly complete. We briefly review the final design features and the resolution of the performance issues that arose in the first prototype devices. We then describe the packaging of the device and the challenges arising in achieving the necessary flatness at the device operating temperature. Plans and schedule for deploying focal-plane arrays of these devices are described.

CCD Imager Technology Development at Lincoln Laboratory

We describe here the continuing research in large-area, back-illuminated CCD imagers at MIT Lincoln Laboratory in collaboration with the University of Hawaii Consortium. Among the developments are a two-layer antireflection coating of TiO2/Al2O3 combined with thick (>40 μm) substrates aimed at broader bandwidth and reduction of Fabry-Perot interference effects in the near infrared. Recent work on the orthogonal-transfer CCD (OTCCD) is described in which the previously noted problem of pockets has been solved with a four-layer polysilicon process. Two new larger OTCCDs (1024×1320 and 2k×4k) have been designed and are in fabrication. The larger OTCCD will use a recently designed four-side-buttable package.

Lincoln Laboratory high-speed solid-state imager technology

Massachusetts Institute of Technology, Lincoln Laboratory (MIT LL) has been developing both continuous and burst solid-state focal-plane-array technology for a variety of high-speed imaging applications. For continuous imaging, a 128 × 128-pixel charge coupled device (CCD) has been fabricated with multiple output ports for operating rates greater than 10,000 frames per second with readout noise of less than 10 e- rms. An electronic shutter has been integrated into the pixels of the back-illuminated (BI) CCD imagers that give snapshot exposure times of less than 10 ns. For burst imaging, a 5 cm × 5 cm, 512 × 512-element, multi-frame CCD imager that collects four sequential image frames at megahertz rates has been developed for the Los Alamos National Laboratory Dual Axis Radiographic Hydrodynamic Test (DARHT) facility. To operate at fast frame rates with high sensitivity, the imager uses the same electronic shutter technology as the continuously framing 128 × 128 CCD imager. The design concept and test results are described for the burst-frame-rate imager. Also discussed is an evolving solid-state imager technology that has interesting characteristics for creating large-format x-ray detectors with ultra-short exposure times (100 to 300 ps). The detector will consist of CMOS readouts for high speed sampling (tens of picoseconds transistor switching times) that are bump bonded to deep-depletion silicon photodiodes. A 64 × 64-pixel CMOS test chip has been designed, fabricated and characterized to investigate the feasibility of making large-format detectors with short, simultaneous exposure times.

High-fill-factor, burst-frame-rate charge-coupled device

A 512/spl times/512-element, multi-frame charge-coupled device (CCD) has been developed for collecting four sequential image frames at megahertz rates. To operate at fast frame rates with high sensitivity, the imager uses an electronic shutter technology developed for back-illuminated CCDs. The megahertz frame rates also required metal strapping of the polysilicon gate electrodes. Tested imagers have demonstrated multi-frame capture capability.