Anjelika Votintseva

Supporting UML--based Development of Embedded Systems by Formal Techniques

We describe an approach to support UML-based development of embedded systems by formal techniques. A subset of UML is extended with timing annotations and given a formal semantics. UML models are translated, via XMI, to the input format of formal tools, to allow timed and non-timed model checking and interactive theorem proving. Moreover, the Play-Engine tool is used to execute and analyze requirements by means of live sequence charts. We apply the approach to a part of an industrial case study, the MARS system, and report about the experiences, results and conclusions.

Analysis of a Complex System for Electrical Mobility Using a Model-Based Engineering Approach Focusing on Simulation

Abstract Electrical mobility is a highly innovative field with fast development cycles and rapid evolution of its core architectures. Also, the system complexity is quickly increasing. Especially challenging in industrial settings is the tight integration of mechanical, electrical and software domains within so called mechatronic systems. In modern engineering processes, simulation models are used for the analysis of different aspects of such systems. In this paper, we report our experience with a model-based and simulation-focused methodology for system engineering which allows quick validation of different architectural decisions at early development phases. We present an approach for integration between engineering tools using the automated generation of simulation models from the system description. The feasibility of the proposed methods is demonstrated with a sample application from electrical mobility, which also exemplifies the challenges of the integrated analysis of mechatronic systems. Specialized modeling languages based on the UML standard are used for the overall description of the system, for the analysis of its functionality, and for the specification of combined configurations. Another standard, Modelica language, is used for the simulation of different physical aspects of the system.

The ETSI Test Description Language TDL and its application

The wide-scale introduction of model-based testing techniques in an industrial context faces many obstacles. One of the obstacles is the existing methodology gap between informally described test purposes and formally defined test descriptions used as the starting point for test automation. The provision of an explicit test description becomes increasingly essential when integrating complex, distributed systems and providing support for conformance and interoperability tests of such systems. The upcoming ETSI standard on the Test Definition Language (TDL) covers this gap. It allows describing scenarios on a higher abstraction level than programming or scripting languages. Furthermore, TDL can be used as an intermediate representation of tests generated from other sources, e.g. simulators, test case generators, or logs from previous test runs. TDL is based on a meta-modelling approach that expresses its abstract syntax. Deploying this design approach, individual concrete syntaxes of TDL can be designed for different application domains. The paper provides an overview of TDL and discusses its application on a use case from the rail domain.

Experience report: Formal verification and testing in the development of embedded software

The paper summarizes our experiences in applying formal verification using the explicit-state model checker SPIN and combining it with a model-based testing approach to support the validation of embedded software. The discussed example covers a crucial part of the firmware of the fault-tolerant programmable logic controller Siemens SIMATIC S7-400H. The chosen approach is outlined and obstacles that were faced during the project are discussed. The paper advocates why formal verification is not suitable as a standalone method in industrial projects. Rather it must be combined with an appropriate validation method such as testing to maximize the benefits from the combination of both approaches. In this case, formal verification complements code or design model reviews, and testing benefits from the availability of correct formal models provided during verification process.