Anshul A. Vyas
Santa Clara University
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Publication
Featured researches published by Anshul A. Vyas.
Semiconductor Science and Technology | 2014
Patrick Wilhite; Anshul A. Vyas; Jason Tan; Jasper Tan; Toshishige Yamada; Phillip Wang; Jeongwon Park; Cary Y. Yang
To realize nanocarbons in general and carbon nanotube (CNT) in particular as on-chip interconnect materials, the contact resistance stemming from the metal?CNT interface must be well understood and minimized. Understanding the complex mechanisms at the interface can lead to effective contact resistance reduction. In this study, we compile existing published results and understanding for two metal?CNT contact geometries, sidewall or side contact and end contact, and address key performance characteristics which lead to low contact resistance. Side contacts typically result in contact resistances >1 k?, whereas end contacts, such as that for as-grown vertically aligned CNTs on a metal underlayer, can be substantially lower. The lower contact resistance for the latter is due largely to strong bonding between edge carbon atoms with atoms on the metal surface, while carrier transport across a side-contacted interface via tunneling is generally associated with high contact resistance. Analyses of high-resolution images of interface nanostructures for various metal?CNT structures, along with their measured electrical characteristics, provide the necessary knowledge for continuous improvements of techniques to reduce contact resistance. Such contact engineering approach is described for both side and end-contacted structures.
IEEE Electron Device Letters | 2015
Changjian Zhou; Anshul A. Vyas; Patrick Wilhite; Phillip Wang; Mansun Chan; Cary Y. Yang
We report resistance results from carbon nanotube (CNT) vias of widths from 150 to 60 nm for potential application in integrated circuits technology. Selective CNT growth inside the vias with an areal density of 2×1011/cm2 is achieved with a statistical average resistance of 1.7 kΩ with standard deviation between 420 Ω and 7.1 kΩ, and lowest resistance of 150 Ω for 60 nm vias, the lowest reported value for sub-100 nm-CNT vias. Statistical analysis yields a best-case projected value of 295 Ω for a 30 nm via, within one order of magnitude of its copper and tungsten counterparts.
Nanotechnology | 2014
Patrick Wilhite; Hyung Soo Uh; Nobuhiko Kanzaki; Phillip Wang; Anshul A. Vyas; Shusaku Maeda; Toshishige Yamada; Cary Y. Yang
Ion-beam-induced deposition (IBID) and electron-beam-induced deposition (EBID) with tungsten (W) are evaluated for engineering electrical contacts with carbon nanofibers (CNFs). While a different tungsten-containing precursor gas is utilized for each technique, the resulting tungsten deposits result in significant contact resistance reduction. The performance of CNF devices with W contacts is examined and conduction across these contacts is analyzed. IBID-W, while yielding lower contact resistance than EBID-W, can be problematic in the presence of on-chip semiconducting devices, whereas EBID-W provides substantial contact resistance reduction that can be further improved by current stressing. Significant differences between IBID-W and EBID-W are observed at the electrode contact interfaces using high-resolution transmission electron microscopy. These differences are consistent with the observed electrical behaviors of their respective test devices.
Nanotechnology | 2016
Anshul A. Vyas; Changjian Zhou; Yang Chai; Phillip Wang; Cary Y. Yang
Advances in semiconductor technology due to the aggressive downward scaling of on-chip feature sizes have led to rapid rises in the resistivity and current density of interconnect conductors. As a result, current interconnect materials, Cu and W, are subject to performance and reliability constraints approaching or exceeding their physical limits. Therefore, alternative materials are being actively considered as potential replacements to meet such constraints. The carbon nanotube (CNT) is among the leading replacement candidates for on-chip interconnect vias due to its high aspect-ratio nanostructure and superior current-carrying capacity to Cu and W, as well as other potential candidates. Based on the results for 40 nm and 60 nm top-contact metallized CNT vias, we demonstrate that not only are their current-carrying capacities two orders of magnitude higher than their Cu and W counterparts, they are enhanced by reduced via resistance due to contact engineering facilitated by the first reported contact resistance extraction scheme for a 40 nm linewidth.
Nanotechnology | 2017
Changjian Zhou; Richard Senegor; Zachary Baron; Yihan Chen; Salahuddin Raju; Anshul A. Vyas; Mansun Chan; Yang Chai; Cary Y. Yang
Carbon nanotubes (CNTs) and graphene are potential candidates for future interconnect materials. CNTs are promising on-chip via interconnect materials due to their readily formed vertical structures, their current-carrying capacity, which is much larger than existing on-chip interconnect materials such as copper and tungsten, and their demonstrated ability to grow in patterned vias with sub-50 nm widths; meanwhile, graphene is suitable for horizontal interconnects. However, they both present the challenge of having high-resistance contacts with other conductors. An all-carbon structure is proposed in this paper, which can be formed using the same chemical vapor deposition method for both CNTs and graphene. Vertically aligned CNTs are grown directly on graphene with an Fe or Ni catalyst. The structural characteristics of the graphene and the grown CNTs are analyzed using Raman spectroscopy and electron microscopy techniques. The CNT-graphene interface is studied in detail using transmission electron microscopic analysis of the CNT-graphene heterostructure, which suggests C-C bonding between the two materials. Electrical measurement results confirm the existence of both a lateral conduction path within graphene and a vertical conduction path in the CNT-graphene heterostructure, giving further support to the C-C bonding at the CNT-graphene interface and resulting in potential applications for all-carbon interconnects.
IEEE Transactions on Nanotechnology | 2018
Anshul A. Vyas; Changjian Zhou; Cary Y. Yang
A comprehensive review of challenges and potential solutions associated with the impact of downscaling of integrated circuit (IC) feature sizes on on-chip interconnect materials is presented. The adoption of Moores Law has led to developments and manufacturing of transistors with nanoscale dimensions, faster switching speeds, lower power consumption, and lower costs in recent generations of IC technology nodes. However, shrinking dimensions of wires connecting transistors have resulted in degradations in both performance and reliability, which in turn limit chip speed and lifetime. Therefore, to sustain the continuous downward scaling, alternative interconnect conductor materials to replace copper (Cu) and tungsten (W) must be explored to meet and overcome these challenges.
international interconnect technology conference | 2016
Anshul A. Vyas; Cary Y. Yang; Phillip Wang; Changjian Zhou; Yang Chai
Carbon nanotubes (CNTs) are promising materials for on-chip interconnect contacts and vias. We report results on 40 nm top-contact metallized CNT vias consisting of the first experimentally extracted contact resistance for this linewidth and current-carrying capacity two orders of magnitude higher than their Cu and W counterparts, well above the ITRS roadmap specifications. To obtain via resistance comparable to those of Cu and W, contact engineering remains a challenge but can be facilitated with the reported contact resistance extraction scheme.
ieee international conference on solid state and integrated circuit technology | 2014
Patrick Wilhite; Anshul A. Vyas; Cary Y. Yang
To realize carbon nanotube (CNT) as on-chip interconnect materials, the contact resistance stemming from the metal-CNT interface must be well understood and minimized. In this study, we compile existing published results and understanding for two metal-CNT contact geometries, sidewall or side contact and end contact, and address their key performance characteristics. Side contacts typically result in contact resistances > 1 kΩ, whereas end contacts, such as that for as-grown vertically aligned CNTs on a metal underlayer, can be substantially lower. The lower contact resistance for the latter is due largely to strong bonding between edge carbon atoms with atoms on the metal surface, while carrier transport across a side-contacted interface via tunneling is generally associated with high contact resistance. Analyses of high-resolution images of interface nanostructures for various metal-CNT structures, along with their measured electrical characteristics, provide the necessary knowledge for continuous improvements of techniques to reduce contact resistance. Such contact engineering approach is described for both side and end-contacted structures.
Journal of Applied Physics | 2018
Yusuke Abe; Makoto Suzuki; Anshul A. Vyas; Cary Y. Yang
A major challenge for carbon nanotube (CNT) to become a viable replacement of copper and tungsten in the next-generation on-chip via interconnects is the high contact resistance between CNT and metal electrodes. A first step in meeting this challenge is an accurate characterization of via contact resistance. In this paper, the scanning electron microscope (SEM) image contrast at low landing energy is employed to estimate the conductive CNT area inside vias. The total conductive CNT area inside each via is deduced using SEM image with 0.1 keV landing energy and a specified threshold brightness, yielding via resistance versus CNT area behavior, which correlates well with electrical nanoprobing measurements of via resistance. Monte Carlo simulation of secondary electron generation lends further support for our analysis and suggests that the residue covering the CNT does not affect the conduction across the contact for residue thickness below 1 nm. This imaging and analysis technique can add much value to CNT...
international conference on electron devices and solid-state circuits | 2016
Anshul A. Vyas; Changjian Zhou; Patrick Wilhite; Phillip Wang; Cary Y. Yang
The continuous downward scaling in integrated circuit (IC) technologies has led to rapid shrinking of transistor and interconnect feature sizes. Scaling causes reduction in interconnect linewidth, which leads to surge in resistance due to increased contributions from grain boundary and surface scattering of electrons in the metal lines. Further, current density inside interconnects is also enhanced by the reduced linewidth and is approaching or exceeding the current-carrying capacity of the existing interconnect metals, copper (Cu) and tungsten (W). The resulting failure due to electromigration presents a critical challenge for end-of-roadmap IC technology nodes. Therefore, alternative materials such as nanocarbons and silicides are being investigated as potential replacements for Cu and W as they have superior electrical and mechanical properties in the nanoscale. In this review, the electrical properties of nanocarbons, in particular carbon nanotubes (CNTs), are examined and their performance and reliability in the sub-100 nm regime are assessed. Further, the measured properties are used to project 30 nm CNT via properties, which are compared with those of Cu and W.