Anthony O’Neill

Experimental Observation of Negative Capacitance in Ferroelectrics at Room Temperature

Effective negative capacitance has been postulated in ferroelectrics because there is a hysteresis in plots of polarization-electric field. Compelling experimental evidence of effective negative capacitance is presented here at room temperature in engineered devices, where it is stabilized by the presence of a paraelectric material. In future integrated circuits, the incorporation of such negative capacitance into MOSFET gate stacks would reduce the subthreshold slope, enabling low power operation and reduced self-heating.

Device and circuit performance of SiGe/Si MOSFETs

Abstract It is shown that a 4-fold improvement in static and dynamic CMOS circuit performance can be achieved by the introduction of strained silicon MOSFETs. A 2-fold improvement is obtained using pseudomorphic SiGe pMOSFETs in static CMOS. The industry standard compact model BSIM3v3 is able to capture the features of buried channel and surface channel SiGe based MOSFETs for SPICE simulations. TCAD shows that surface channel strained silicon MOSFETs offer better n-channel performance than buried channel devices, while p-channel devices buried up to 4 nm may outperform surface channel pMOSFETs. The impact of achievable mobility on device design and performance is presented.

The sinusoidal probe: a new approach to improve electrode longevity

Micromotion between the brain and implanted electrodes is a major contributor to the failure of invasive brain–machine interfaces. Movements of the electrode tip cause recording instabilities while spike amplitudes decline over the weeks/months post-implantation due to glial cell activation caused by sustained mechanical trauma. We have designed a sinusoidal probe in order to reduce movement of the recording tip relative to the surrounding neural tissue. The probe was microfabricated from flexible materials and incorporated a sinusoidal shaft to minimize tethering forces and a 3D spheroid tip to anchor the recording site within the brain. Compared to standard microwire electrodes, the signal-to-noise ratio and local field potential power of sinusoidal probe recordings from rabbits was more stable across recording periods up to 678 days. Histological quantification of microglia and astrocytes showed reduced neuronal tissue damage especially for the tip region between 6 and 24 months post-implantation. We suggest that the micromotion-reducing measures incorporated into our design, at least partially, decreased the magnitude of gliosis, resulting in enhanced longevity of recording.

Computer simulation of electromigration in thin‐film metal conductors

A model is presented for simulating electromigration in thin‐film metal conductors. The backfluxes are calculated explicitly in each of the grain boundaries using concentration and stress gradients resulting from the initial electromigration flux. The stress‐dependent diffusivity term is also directly included in the formulation. It is assumed that the main cause of the flux divergence is the grain structure of the conductor and that these divergences occur at the triple‐point junctions of the grain boundaries. Time‐to‐failure and classic resistometric analyses of five conductors are performed. Results indicate that current‐density exponent of n≊2 should be used in time‐to‐failure analysis. This is due to the localized stress migration and diffusion acting against the electromigration force throughout the period of the conductor lifetime. A direct correlation between the time to failure (TTF) and relative rate of resistance change Rrc was found when all conductors and stress conditions were considered tog...

A comprehensive study on the leakage current mechanisms of Pt/SrTiO3/Pt capacitor

The leakage current characteristics of SrTiO3 MIM capacitors, fabricated using atomic layer deposition, are investigated. The characteristics are highly sensitive to the polarity and magnitude of applied voltage bias, punctuated by sharp increases at high field. The characteristics are also asymmetric with bias and the negative to positive current crossover point always occurs at a negative voltage bias. In this work, a model comprising thermionic field emission and tunneling phenomena is proposed to explain the dependence of leakage current upon the device parameters quantitatively.

Gate leakage mechanisms in strained Si devices

This work investigates gate leakage mechanisms in advanced strained Si∕SiGe metal-oxide-semiconductor field-effect transistor (MOSFET) devices. The impact of virtual substrate Ge content, epitaxial material quality, epitaxial layer structure, and device processing on gate oxide leakage characteristics are analyzed in detail. In state of the art MOSFETs, gate oxides are only a few nanometers thick. In order to minimize power consumption, leakage currents through the gate must be controlled. However, modifications to the energy band structure, Ge diffusion due to high temperature processing, and Si∕SiGe material quality may all affect gate oxide leakage in strained Si devices. We show that at high oxide electric fields where gate leakage is dominated by Fowler-Nordheim tunneling, tensile strained Si MOSFETs exhibit lower leakage levels compared with bulk Si devices. This is a direct result of strain-induced splitting of the conduction band states. However, for device operating regimes at lower oxide electri...

Mechanical Flexibility Reduces the Foreign Body Response to Long-Term Implanted Microelectrodes in Rabbit Cortex

Micromotion between the brain and implanted electrodes is a major contributor to the failure of invasive microelectrodes. Movements of the electrode tip cause recording instabilities while spike amplitudes decline over the weeks/months post-implantation due to glial cell activation caused by sustained mechanical trauma. We compared the glial response over a 26–96 week period following implantation in the rabbit cortex of microwires and a novel flexible electrode. Horizontal sections were used to obtain a depth profile of the radial distribution of microglia, astrocytes and neurofilament. We found that the flexible electrode was associated with decreased gliosis compared to the microwires over these long indwelling periods. This was in part due to a decrease in overall microgliosis and enhanced neuronal density around the flexible probe, especially at longer periods of implantation.

Effect of crystallographic orientation and employment of different cutting tools on micro-end-milling of monocrystalline silicon

This article presents the research on the effect of crystallographic orientation and different cutting tool effect during micro-milling of (001) silicon wafer. Excessive generation of undesirable surface and subsurface damages often occurs when machined at thick depth of cut of several hundreds of microns. Up-milling operations along <100> and <110> directions were performed on a (001) wafer, and the results show that machining surfaces along <100> were of better quality than those of <110> and are in agreement with previous studies. In addition, comparative studies of diamond-coated, chemical vapour–deposited and single crystal diamond end-mills were performed along [ 0 1 ¯ 0 ] at 150 µm deep. Results have shown that diamond-coated tool generates the least edge chipping. This might be due to the large negative rake angle creating highly compressive hydrostatic pressure in the cutting zone and therefore suppressing the crack propagation. Furthermore, no visible defects were detected on the bottom-machined surface when machined by chemical vapour–deposited and single crystal diamond end-mills. Surface edge chipping however remains a challenge, even though micro-milling were performed along <100> with single crystal diamond end-mill. Apart from milling along <100>, protection to the top silicon surface is required to achieve fracture-free quality micro-milled silicon.

Top-down fabrication of single crystal silicon nanowire using optical lithography

A method for fabricating single crystal silicon nanowires is presented using top-down optical lithography and anisotropic etching. Wire diameters as small as 10 nm are demonstrated using silicon on insulator substrates. Structural characterization confirms that wires are straight, have a triangular cross section and are without breakages over lengths of tens of microns. Electrical characterization indicates bulk like mobility values, not strongly influenced by surface scattering or quantum confinement. Processing is compatible with conventional silicon technology having much larger critical dimensions. Integrating such nanowires with a mature CMOS technology offers an inexpensive route to their exploitation as sensors.

Device applications of interband tunneling structures with one, two, and three dimensions

A systematic study of interband tunneling between states of one, two, and three dimensions (1D, 2D, 3D) is presented based on the theory of the Esaki tunnel diode, modified to take interdimensional tunneling into account. I‐V characteristics are given for each of the nine possible combinations. Three systems are dealt with in greater depth: 2D‐3D tunneling, where a comparison with experimental data is made, 2D‐2D tunneling, where improvements over the conventional tunnel diode characteristic are seen, and 2D‐1D tunneling where the prospect of a tristable device is discussed.