Antonino Conte

A complete model of E/sup 2/PROM memory cells for circuit simulations

E/sup 2/PROM memory devices are widely used in embedded applications. For an efficient design flow, a correct modeling of these memory cells in every operation condition becomes more and more important, especially due to power consumption limitations. Although E/sup 2/PROM cells have being used for a long time, very few compact models have been developed. Here, we present a complete compact model based on an original procedure to calculate the floating gate potential in DC conditions, without the need of any capacitive coupling coefficient. This model is designed as a modular structure, so to simplify program/erase and reliability simulations. Program/erase and leakage currents are included by means of simple voltage-controlled current sources implementing their analytical expression. It can be used to simulate memory cells both during read operation (DC conditions) and during program and erase (transient conditions) giving always very accurate results. We show also that, provided there are good descriptions of degradation mechanisms, the same model can be used also for reliability simulations, predicting charge loss due to tunnel oxide degradation.

A high-performance very low-voltage current sense amplifier for nonvolatile memories

A high-performance sense amplifier for nonvolatile memories capable of working under a very low-voltage power supply is presented. The topology of the sense amplifier uses a pure current-mode comparison allowing power supplies lower than 1 V to be used and includes two subcircuits which improve slew rate performance. The sense amplifier was implemented in an EEPROM realized with a 0.18-/spl mu/m EEPROM technology. Experimental results showed a read access time of about 30 ns with a power supply of 1.65 V.

A 1.35-V sense amplifier for non volatile memories based on current mode approach

A sense amplifier for nonvolatile memories, based on a novel topology which has the benefit of a pure current mode comparison, is presented. The sense amplifier is capable of working under a very low voltage power supply - as low as 1 V, and was implemented in an EEPROM realized with a 0.18 /spl mu/m EEPROM technology. Setting the power supply at 1.65 V, experimental results shown a read access time of about 30 ns.

Floating-Gate 1Tr-NOR eFlash Memory

In this chapter, we will highlight the peculiar features of one of the most popular implementations of the embedded flash cell: the so-called 1Tr-NOR. The one-transistor cell has been by far the most adopted cell architecture in the world of flash NOR stand-alone memory. As an almost natural consequence, 1Tr-NOR architecture has also been considered the first, and for sure one of the best, solutions in embedded non-volatile memory (NVM) applications and has been progressively replacing EEPROM cells. In this chapter, only embedded multi-megabit flash implementation will be reviewed: different solutions for 1Tr-NOR flash cell structure and design architectures have been successfully implemented and will be described. In particular, the focus hereinafter is based on the description of how the unique features offered by that cell can be efficiently and effectively integrated into MCUs , which represent one of the major fields fueled by embedded flash capability. In the following sections, after a short introduction devoted to highlighting some peculiar technology features related to 1Tr-NOR integration with state-of-the-art CMOS, three different kind of MCU products will be thoroughly analysed: the secure MCU. the general-purpose/low-power MCU. the automotive MCU.