Antônio Otávio Fernandes

Scheduling nodes in wireless sensor networks: a Voronoi approach

A wireless sensor network is a special kind of ad-hoc network with distributed sensing and processing capability that can be used in a wide range of applications, such as environmental monitoring, industrial applications and precision agriculture. Despite their potential applications, such networks have particular features imposed by resource restrictions, such as low computational power, reduced bandwidth and specially limited power source. In case of a network with a high density of sensor nodes, some problems may arise such as the intersection of sensing area, redundant data, communication interference, and energy waste. A management application is necessary to make the most of network resources. On the other hand, a high-density network can introduce a fault-tolerant mechanism, increase precision, and provide multi-resolution data. The network density control depends on the application. In this paper, we propose a method to set up which nodes should be turned off or on. The management may take the sensor node out of service temporally. Our design uses a Voronoi diagram, which decomposes the space into regions around each node. That schema could be used in management architecture for a wireless sensor network.

A FPGA Implementation of a DCT-Based Digital Electrocardiographic Signal Compression Device

The use of portable Electrocardiographic (ECG) recording devices is directly dependent on the amount of physical memory available. Common recording techniques using enough bit encoding at a normal sampling rate can take as much as 80 Mbytes of storing space for a whole 24-hour period. This paper describes a simplified implementation of a Discrete Cosine Transform (DCT) algorithm for digital signal compression to be implemented on a Field Programmable Gate Array (FPGA) device. Theoretic compression ratios of 7:1 are expected, enabling the use of portable 16-Mbyte non-volatile memory cards.

Data Stream Based Algorithms For Wireless Sensor Network Applications

A wireless sensor network (WSN) is energy constrained, and the extension of its lifetime is one of the most important issues in its design. Usually, a WSN collects a large amount of data from the environment. In contrast to the conventional remote sensing - based on satellites that collect large images, sound files, or specific scientific data - sensor networks tend to generate a large amount of sequential small and tuple- oriented data from several nodes, which constitutes data streams. In this work, we propose and evaluate two algorithms based on data stream, which use sampling and sketch techniques, to reduce data traffic in a WSN and, consequently, decrease the delay and energy consumption. Specifically, the sampling solution, provides a sample of only log n items to represent the original data of n elements. Despite of the reduction, the sampling solution keeps a good data quality. Simulation results reveal the efficiency of the proposed methods by extending the network lifetime and reducing the delay without loosing data representativeness. Such a technique can be very useful to design energy-efficient and time-constrained sensor networks if the application is not so dependent on the data precision or the network operates in an exception situation (e.g., there are few resources remaining or there is an urgent situation).

Efficient power management in real-time embedded systems

Power consumption became a crucial problem in the development of mobile devices, especially those that are communication intensive. In these devices, it is imperative to reduce the power consumption devoted to maintaining a communication link during data transmission/reception. The application of dynamic power management methodologies has contributed to the reduction of power consumption in general purpose computer systems. However, to further reduce power consumption in communication intensive real-time embedded devices, we have to consider the state of the computation and external events in addition to power management policies. In this paper we propose a model of an Extended Power State Machine (EPSM), where we adapt a Power State Machine to include the state of an embedded program in the power state machine formulation. This EPSM model is used to adapt the Quality of Service (QoS) in communication intensive devices to ensure low power consumption. In such development, a middleware layer fits in the systems architecture, being responsible for intercepting the data communication and implementing the EPSM. Also, a software tool was developed, allowing the Middleware Code to be generated based on the State Machine. A case study demonstrates the application of the proposed model to a real situation.

Hardware-software codesign of embedded systems

Widespread use of embedded systems is occurring due to the increase in complexity of digital devices and systems. These systems are currently being implemented by software and hardware components in order to benefit from the strengths of each technology. We present an introduction to hardware/software codesign techniques for embedded systems.

Machine vision applications and development aspects

Machine vision is the application of computer vision and related technologies to industrial automation. Automated visual inspection is one of these applications, which can be used to solve many problems in industry. Industrial applications require customized solutions, subject to several particular constraints. The final step of integration of a vision system to an industrial process is not an easy task, mainly due to the variability of the industrial process; the design of a machine vision system must take in account this variability. This paper presents an overview of computer vision systems, some applications on automated visual inspection, aspects involved in their development, and aspects related to the integration of the vision system to the industrial process.

JADE: An Embedded Systems Specification, Code Generation and Optimization Tool

Market pressures with ever-increasing complexity and shorter time urges the use of formal methods in the system development process to produce new systems faster and cheaper due to the capacity to automate the verification, simulation and code generation. A problem that comes up, however, is that code generated from formal languages is not the most efficient because of the mapping between the specification and the implementation models. To cope with this, we present an optimization technique to enhance the performance of SDL (Specification and Description Language) derived system implementations as well as JADE, a tool that supports the complete development process, from the specification to the implementation.

HydroNode: A low cost, energy efficient, multi purpose node for underwater sensor networks

The research of underwater sensor networks (UWSNs) is gaining attention due to its possible applications in many scenarios, such as ecosystem preservation, disaster prevention, oil and gas exploration and freshwater reservoirs management. The main elements of a UWSN are underwater sensor nodes (UWNs). In this paper we present HydroNode: a low cost, energy efficient, multipurpose underwater sensor node (UWN). Nowadays, to the best of our knowledge, there is no UWNs that is simultaneously low cost, low power, able to couple diverse types of sensors and educationally available. Thus, the objective of this paper is to fill this gap by describing the design of HydroNode, an underwater sensor node that fulfill all these requirements and can be used in various UWSNs applications. We used only commercial off-the-shelf components to build our underwater sensor node. Due to its multipurpose design, HydroNode can be used in different UWSNs, therefore aiding the research of UWSN system protocols, configurations and applications.

Improving SAT-based Combinational Equivalence Checking through circuit preprocessing

This paper presents a new implication tool (Vimplic) which can be used to improve SAT-based combinational equivalence checking. This tool quickly builds the implication graph of the miter circuit and traverse through it inferring implications among its nodes assignments. This set of implications and the miter circuit netlist are converted to conjunctive normal form (CNF) and submitted to the SAT solver in order to prove equivalence between the two circuits of the miter. Using Vimplic we have been able to dramatically reduce the overall verification time of several circuits outperforming the state-of-the-art techniques for CEC such as Berkmin561, NiVER, and C-SAT.

On The Use Data Reduction Algorithms for Real-Time Wireless Sensor Networks

This work presents the design of real-time applications for wireless sensor networks (WSNs) by using an algorithm based on data stream to process the sensor data. The proposed algorithm is based on sampling techniques applied to data histograms created from original data streams acquired by sensor nodes. As a result, the algorithm provides a sample of log n items to represent the original data stream of n elements. In this work, we show how to use the data reduction algorithm in real-time WSN design.