Claudionor José Nunes Coelho

Survey on wireless sensor network devices

Wireless sensor networks are networks of compact microsensors with wireless communication capability. These small devices are relatively cheap with the potential to be disseminated in large quantities. Emerging applications of data gathering range from the environmental to the military. As autonomous devices they can provide pervasive distributed and collaborative network of computer nodes. Architectural challenges are posed for designers such as computational power, energy consumption, energy sources, communication channels and sensing capabilities. Embedded Systems provide the computational platform for hardware and software components to interact with the environment and other nodes. This survey presents the current state-of-the-art for wireless sensor nodes, investigating and analyzing these challenges. We discuss the characteristics and requirements for a sensor node mainly processing, communications, power and sensing components. In this survey we present a comprehensive comparative study of sensor nodes platforms, energy management techniques, off-the-shelf microcontrollers, battery types and radio devices.

A general data fusion architecture

Data fusion is an important component of applications for systems that use correlated data from multiple sources to determine the state ofa system. As the state of the system being monitored and available resources change, the general data fusion famework should change dynamically based on the current environment and available resources in the system. To achieve this goal, we have proposed a general Data Fusion Architecture (DFA) based on the Unfled Modeling Language (UML) and using a taxonomy based on the definitions of raw data and variables or tasks. The DFA can be reconfigured according to the measured environment and availability of the sensing units or data sources, providing a graceful degradation in the view of the environment as resources change. We have shown that we can apply the DFA to dflerent domains and applications. including a test bed health monitoring application.

Dynamic Power Management in Wireless Sensor Networks: An Application-Driven Approach

Energy is a limited resource in wireless sensor networks. In fact, the reduction of power consumption is crucial to increase the lifetime of low power sensor networks. Several approaches on dynamic power management have contributed to reduce the power consumption, but few of them consider the application constraints to optimize it. In this paper, we propose a new application-driven power management approach, where we model the sensor node operation and the application constraints using the hybrid automata framework. We also model a real sensor network application for fire detection and we show the performance of our approach in terms of energy drop, comparing it to an Ideal Model and a Naive approach.

Analysis and synthesis of concurrent digital circuits using control-flow expressions

In this paper, we present a novel modeling style and control synthesis technique for system-level specifications that are better described as a set of concurrent descriptions, their synchronizations, and constraints. The proposed synthesis procedure considers the degrees of freedom introduced by the concurrent models and by the environment in order to satisfy the design constraints. Synthesis is divided into two phases. In the first phase, the original specification is translated into an algebraic system, for which complex control-flow constraints and quantifiers of the design are introduced. In the second phase, we translate the algebraic formulation into a finite-state representation, and we derive an optimal control-unit implementation for each individual concurrent part. In the implementation of the controllers from the finite-state representation, we use flexible objective functions, which allow designers to better control the goals of the synthesis tool, and thus incorporate as much as possible their knowledge about the environment and the design.

Synthesis of low-power selectively-clocked systems from high-level specification

In this paper we propose a technique for synthesizing low-power systems from a high-level specification. We analyze the control flow of the specification to detect mutually exclusive sections of the computation. A selectively-clocked interconnection of interacting FSMs is automatically generated and optimized where each FSM controls the execution of one section of computation. Only one of the interacting FSMs is active at any given clock cycle, while all the others are idle and their clock is stopped. Our interacting FSM implementation achieves consistently lower power dissipation than the functionally equivalent monolithic implementation. On average 37% power savings are obtained with a 30% area overhead.

Efficient power management in real-time embedded systems

Power consumption became a crucial problem in the development of mobile devices, especially those that are communication intensive. In these devices, it is imperative to reduce the power consumption devoted to maintaining a communication link during data transmission/reception. The application of dynamic power management methodologies has contributed to the reduction of power consumption in general purpose computer systems. However, to further reduce power consumption in communication intensive real-time embedded devices, we have to consider the state of the computation and external events in addition to power management policies. In this paper we propose a model of an Extended Power State Machine (EPSM), where we adapt a Power State Machine to include the state of an embedded program in the power state machine formulation. This EPSM model is used to adapt the Quality of Service (QoS) in communication intensive devices to ensure low power consumption. In such development, a middleware layer fits in the systems architecture, being responsible for intercepting the data communication and implementing the EPSM. Also, a software tool was developed, allowing the Middleware Code to be generated based on the State Machine. A case study demonstrates the application of the proposed model to a real situation.

Hardware-software codesign of embedded systems

Widespread use of embedded systems is occurring due to the increase in complexity of digital devices and systems. These systems are currently being implemented by software and hardware components in order to benefit from the strengths of each technology. We present an introduction to hardware/software codesign techniques for embedded systems.

BeanWatcher: A Tool to Generate Multimedia Monitoring Applications for Wireless Sensor Networks

In this paper we present a new tool called BeanWatcher that allows the semi-automatic generation of multimedia monitoring and management applications for wireless sensor networks. Thus, particularities of multimedia management and wireless sensor networks were taken into account. The architecture of the tool is based on a component model flexible enough to allow the creation of new components and the optimization of the components currently provided. BeanWatcher was designed to offer a development environment suitable for both expert and beginner users allowing them to choose the programming language that better fits the application requirements.

Low power/high performance self-adapting sensor node architecture

In this paper we propose a new reconfigurable architecture for sensor nodes, called RANS-300, which can operate in applications demanding low power to high performance, although sacrificing the lifetime of the sensor node. This node has a FPGA board, which can be dynamically reconfigured to add new configuration, and has a Compact Flash device to expand the node possibilities

Synthesis from mixed specifications

We present a hardware synthesis system that accepts system-level specifications in both Verilog HDL and C. A synchronous semantics is assumed for both languages in order to guarantee a uniform underlying model. The rationale for mixed input specifications is to support hardware/software co-design by allowing the migration to hardware of system modules originally described in the C language. We discuss assumptions and limitations of the input description style, a high-level synthesis system, and the application of such a system to some design examples.