Antonius L. A. M. Kemmeren

Elimination of accumulation charge effects for high-resistive silicon substrates

A dedicated silicon process, called PASSI/spl trade/, was developed for passive functions in the GHz regime. The process, using high-resistive silicon with a SiO/sub 2/ top layer as a carrier, is fully compatible with common silicon infrastructures. While the passives perform far better than passives integrated in CMOS or BICMOS chips, their performance is limited by accumulation of charge underneath the SiO/sub 2/ layer. A very effective way to diminish the influence of. this charge is an implantation that creates traps at the Si/SiO/sub 2/ interface, thus reducing the charge mobility. The capacitors and inductors on wafers that were subject to such an implantation step can no longer be distinguished from their counterparts on insulating substrates.

Plasma-assisted atomic layer deposition of TiN monitored by in situ spectroscopic ellipsometry

In situ spectroscopic ellipsometry has been employed to determine the properties of titanium nitride (TiN) films during plasma-assisted atomic layer deposition by alternating TiCl4 precursor dosing and H2–N2 plasma exposure. Besides monitoring the film thickness when optimizing the half reactions, it is shown that spectroscopic ellipsometry is a very valuable tool for in situ studies of (air-sensitive) film properties such as resistivity, and for investigating the nucleation phase during initial film growth.

High-Density, Low-loss MOS Decoupling Capacitors integrated in a GSM Power Amplifier

High-density MOS capacitors have been fabricated with ∼ 30 nF/mm 2 specific capacitance on highly-doped Si-wafers with arrays of macropores with ∼ 2 μm diameter. Using the Bosch process [1] these pores were dry-etched to depths of ∼ 30 μm or more. The enlarged Si-surface thus obtained serves as a substrate for capacitors fabricated by fully MOS-compatible processing. Wafers were fabricated with a top electrode of poly-Si and Al and ‘ONO’ (i.e. oxide / nitride / oxide) dielectric stacks showing 7–10 MV/cm electrical breakdown field and leakage 2 @ 20 V. These wafers were thinned to 380 μm and sawn into dies, representing 40 nF capacitors. Typically low loss factors such as ESR 2 O 3 or laminate substrate as supply-line decoupling capacitors in complete GSM power amplifier test modules. RF decoupling and transmission were measured and compared to identical test modules with conventional discrete ceramic capacitors. The MOS capacitors showed very efficient decoupling, resulting in superior signal stability as measured in the 0 – 1 GHz range (less noisy, free from oscillations). The new capacitor is very suitable for integrated decoupling purposes, e.g. supply-line decoupling in RF wireless communication and analog and mixed-signal systems.