Arthur T. G. Fuller

Optimization of FIR digital filters over the canonical signed-digit coefficient space using genetic algorithms

In a recent paper a novel approach was presented for the restoration of canonical signed-digit (CSD) numbers to their correct format after the application of crossover and mutation operations in genetic algorithms. This paper is concerned with the development of a new technique for the optimization of FIR digital filters over the CSD coefficient space based on genetic algorithms. This optimization technique exploits the aforementioned restoration of CSD numbers in conjunction with the conventional crossover and mutation operators in addition to a new local mutation operator. The resulting technique is applicable not only to the global optimization of FIR digital filters, but also the conversion of digital filters with specified infinite-precision coefficients to their corresponding finite precision CSD coefficients. An application example is given to illustrate the resulting technique.

A novel modified branch-and-bound technique for discrete optimization over canonical signed-digit number space

A novel algorithm is presented for the design of DSP systems by optimization using the branch-and-bound technique over the canonical signed-digit (CSD) multiplier coefficient space. The proposed algorithm has two main salient features: (1) For a given infinite-precision decimal floating radix-point multiplier coefficient x, it can directly provide the corresponding decimal floating radix-point values for the smallest representable CSD coefficient greater than x and the largest representable CSD coefficient less than x, where these CSD coefficients have pre-specified wordlength and number of nonzero digits. (2) It does not make any recourse to conversion from CSD to decimal, and vice versa, from decimal to CSD conversion. The proposed algorithm finds applications in the optimization of multi-rate IIR or FIR digital filters over the CSD coefficient space.

Design and switched-capacitor implementation of a new cascade-of-resonators /spl Sigma/-/spl Delta/ converter configuration

Recently, the authors combined the hitherto cascade-of-integrators and cascade-of-resonators /spl Sigma/-/spl Delta/ converter configurations into a single cascade-of-resonators bandpass /spl Sigma/-/spl Delta/ converter. The salient features of the resulting bandpass /spl Sigma/-/spl Delta/ converter configuration is that it leads to the realization of complementary signal and noise transfer functions while permitting the automatic placement of the noise transfer function zeros at real frequencies (i.e. on the unit-circle in the discrete-time z domain). This /spl Sigma/-/spl Delta/ converter configuration consists of one single-bit quantizer and N second-order resonators (N second-order resonators and 1 integrator, respectively), leading to the realization of an even 2N-th (an odd (2N+1)-th, respectively) order bandpass /spl Sigma/-/spl Delta/ converter. This paper is concerned with an investigation and Monte-Carlo simulation of the proposed cascade-of-resonators bandpass /spl Sigma/-/spl Delta/ converter configuration satisfying a practical set of design specifications for a corresponding hardware implementation using the switched-capacitor technology.

Design of first- and second-order bode-type wave-digital variable-amplitude equalizers

This paper presents a synthesis technique for the design of first- and second-order Bode-type wave-digital (WD) variable-amplitude equalizers. The proposed first-order equalizer consists of one unit-delay and two digital multipliers and produces a fan-shaped magnitude-frequency response, while the proposed second-order equalizer consists of two unit-delays and three digital multipliers and produces a bump-shaped magnitude-frequency response. The salient feature of the resulting WD equalizers is that only a single digital variable multiplier is required to control the fan amplitude in the first-order equalizer and the bump amplitude in the second-orderequalizer without changing their other important magnitude-frequency response characteristics (e.g., the cut-off frequency in the fan equalizer and the centre frequency and quality factor in the bump equalizer). Moreover, these equalizers remain bounded-input bounded-output (BIBO) stable (under infinite-precision arithmetic) for all possible values of the variable multiplier. In addition, they exhibit the important practical feature that a geometrically symmetric change in the value of the variable multiplier causes a corresponding arithmetically symmetric change in the logarithmic magnitude-frequency response of the equalizer. Application examples are given to illustrate the main results.

An exact BIBO stability condition for Bode-type variable-amplitude digital equalizers

In previous publications, the authors presented novel techniques for the design and realization of Bode-type variable-amplitude digital equalizers. The frequency response of the resulting variable-amplitude digital equalizers can be varied from that of an arbitrary shaping transfer function to its inverse by varying the value of a single variable digital multiplier. This paper is concerned with the development of an exact bounded-input bounded-output (BIBO) stability condition for general-order Bode-type variable-amplitude digital equalizers. The salient feature of the resulting BIBO stability condition is that it guarantees the stability of the Bode-type variable-amplitude digital equalizers over an entire range of values for the constituent variable digital multiplier. Moreover, this BIBO stability condition can simply be evaluated by examining the shaping transfer function associated with the variable-amplitude digital equalizer proper.

Design of arbitrary-order minimal operational-amplifier BIBO stable Bode-type variable-amplitude active-RC equalizers

This paper presents a new technique for the exact design and minimal operational-amplifier realization of arbitrary-order bounded-input-bounded-output (BIBO) stable Bode-type variable-amplitude (VA) active-RC equalizers. This technique is based on the realization of the VA equalizer transfer function directly as the voltage transfer function from port 1 to port 2 of an active-R three-port network when its port 3 is terminated in the active-RC realization of the corresponding (positive-real) shaping impedance function. The salient feature of the resulting VA active-RC equalizers is that they permit the continuous variation of the equalizer transfer function from the corresponding shaping transfer function to its inverse through the use of one single (positive) variable resistor only. In addition, they permit arithmetically symmetric changes in the logarithmic magnitude-frequency response of the equalizer through geometrically symmetric changes in the value of the constituent variable resistor. An application example is given to illustrate the main results.

An alternative approach to the design and synthesis of higher-order Bode-type variable-amplitude wave-digital equalizers

This paper presents an alternative approach to the design and synthesis of higher-order Bode-type variable-amplitude (VA) wave-digital (WD) equalizers. The proposed approach is based on, (a) the development of a theoretical method for the derivation of a corresponding VA analog equalizer shaping transfer function starting from a set of high-level system design specifications, (b) the development of a synthesis approach for a suitable analog prototype reference network for a WD equalizer realization requiring one single variable digital multiplier only, and (c) the development of a method for the transformation of the analog prototype reference network to the desired VA WD equalizer without making any recourse to the use of three-port series or parallel adapters inherent in the conventional WD realization techniques. The resulting VA WD equalizers permit the continuous variation of the WD equalizer transfer function from the shaping transfer function to its inverse through the use of a single variable digital multiplier. In addition, they exhibit the important practical feature that a geometrically symmetric change in the value of the variable digital multiplier causes a corresponding arithmetically symmetric change in the logarithmic magnitude-frequency response of the WD equalizer. An application example is given to illustrate the main results.

A novel approach to the design of higher-order Bode-type variable-amplitude wave-digital equalizers

This paper presents a novel approach to the design of higher-order Bode-type variable-amplitude (VA) wave-digital (WD) equalizers. This approach is based on, (a) the derivation of a corresponding continuous-time VA equalizer transfer function from a set of high-level system design specifications, (b) the development of an analog prototype reference network suitable for a corresponding WD equalizer realization, and (c) the transformation of the analog prototype reference network to the desired VA WD equalizer through the use of the bilinear frequency transformation. The salient feature of the resulting VA WD equalizers is that they permit the continuous variation of the WD equalizer transfer function from a shaping transfer function to its inverse while requiring one single variable digital multiplier only. In addition, they exhibit the important practical feature that a geometrically symmetric change in the value of the variable digital multiplier causes a corresponding arithmetically symmetric change in the logarithmic magnitude-frequency response of the WD equalizer. An application example is given to illustrate the main results.

Investigation of a new cascade-of-resonators /spl Sigma/-/spl Delta/ converter configuration

In the past, a number of bandpass /spl Sigma/-/spl Delta/ a converter configurations have appeared in the literature. Among these, there are two configurations which are of particular practical interest: The cascade-of-integrators and cascade-of-resonators /spl Sigma/-/spl Delta/ a converters. This paper is concerned with an investigation of a new cascade-of-resonators bandpass /spl Sigma/-/spl Delta/ converter,which combines the main salient features of the latter two configurations. These features include, complementary signal and noise transfer functions, and noise transfer function zeros at real frequencies. The new configuration consists of a single-bit quantizer and N second-order resonators (N second-order resonators and 1 integrator; respectively), leading to a N-th (2N+1-th, respectively) order /spl Sigma/-/spl Delta/ converter. The proposed investigation is undertaken in terms of the design of a corresponding sixth-order bandpass /spl Sigma/-/spl Delta/ converter satisfying a practical set of specifications.

A novel approach to the exact design of first- and second-order Bode-type variable-amplitude bilinear-LDI switched-capacitor equalizers

This paper presents a novel approach to the exact design of first- and second-order Bode-type variable-amplitude (VA) bilinear-LDI switched-capacitor (SC) equalizers. The proposed design approach is based on the realization of the VA equalizer transfer function as the transfer function of a frequency-independent two-terminal-pair SC network at its input terminal-pair when its output terminal-pair is terminated in a (frequency-dependent) SC one-terminal-pair realization of the dual of the equalizer shaping impedance function. The resulting first-order equalizers produce fan-shaped lowpass or highpass magnitude-frequency responses, while the resulting second-order equalizer produces a bump-shaped (bandpass) magnitude-frequency response. The salient feature of the proposed SC equalizers is that only a single variable capacitor is required to control the fan amplitude in the first-order equalizers and the bump amplitude in the second-order equalizer. Moreover, these equalizers remain BIBO stable for all possible values of the variable capacitor. In addition, they exhibit the important practical feature that a geometrically symmetric change in the value of the variable capacitor causes a corresponding arithmetically symmetric change in the logarithmic magnitude-frequency response of the VA equalizer. An application example is given to illustrate the main results.