Asawaree Kalavade

A global criticality/local phase driven algorithm for the constrained hardware/software partitioning problem

An algorithm for the constrained hardware/software partitioning (assignment and scheduling) problem is presented. The key feature of the algorithm is the adaptive objective mechanism governed by the combination of global and local measures. As hardware area minimization and latency constraints present contradictory objectives, a global time-criticality (GC) measure selects an objective function in accordance with feasibility. In addition to global consideration, local characteristics of the nodes are emphasized by classifying nodes into local phase (LP) types. A local phase 1 node (extremity) has an obvious preference for an implementation on the basis of its area/time requirements. A local phase 2 node (repeller) is a repeller to an implementation on the basis of relative preferences of other nodes. At each iteration, the global and local criteria are superimposed by a threshold mechanism so as to determine the best implementation. The algorithm has quadratic complexity in the number of nodes and has shown promising behaviour on the examples tested.<<ETX>>

The extended partitioning problem: hardware/software mapping and implementation-bin selection

The extended partitioning problem is the joint problem of mapping nodes in a precedence graph to hardware or software, and within each mapping, selecting an appropriate implementation for each node. The end-goal is to minimize the hardware area, subject to architectural and performance constraints. This is an NP-complete problem; we present an efficient heuristic called MIBS to solve it. The MIBS (Mapping and Implementation-Bin Selection) algorithm solves the extended partitioning problem by decomposing it into an iterative process consisting of two steps: mapping and implementation-bin selection (IBS). The GCLP (Global Criticality/Local Phase-driven) algorithm computes a mapping by using an adaptive optimization objective at each iteration. This objective is selected on the basis of a global time criticality measure and local optimality measures. The IBS algorithm solves the implementation-bin selection problem. It uses a bin sensitivity measure which correlates the implementation bin motion with the overall hardware area reduction, to determine the implementation bin of a node for a given mapping. Experimental results indicate that the added dimension of design flexibility (offered by implementation bins) can be used effectively in partitioning to reduce the overall area. The MIBS algorithm has O(|N|/sup 3/) complexity, with a solution quality comparable to that of ILP (integer linear programming).

The Extended Partitioning Problem: Hardware/Software Mapping, Scheduling, and Implementation-bin Selection

In system-level design, applications are represented as task graphs where tasks (called nodes) have moderate to large granularity and each node has several implementation options differing in area and execution time. We define the extended partitioning problem as the joint determination of the mapping (hardware or software), the implementation option (called implementation bin), as well as the schedule, for each node, so that the overall area allocated to nodes in hardware is minimum and a deadline constraint is met. This problem is considerably harder (and richer) than the traditional binary partitioning problem that determines just the best mapping and schedule. Both binary and extended partitioning problems are constrained optimization problems and are NP-hard.We first present an efficient(O(N2)) heuristic, called GCLP, to solve the binary partitioning problem. The heuristic reduces the greediness associated with traditional list-scheduling algorithms by formulating a global measure, called global criticality (GC). The GC measure also permits an adaptive selection of the optimization objective at each step of the algorithm; since the optimization problem is constrained by a deadline, either area or time is optimized at a given step based on the value of GC. The selected objective is used to determine the mapping of nodes that are “normal”, i.e. nodes that do not exhibit affinity for a particular mapping. To account for nodes that are not “normal”, we define “extremities” and “repellers”. Extremities consume disproportionate amounts of resources in hardware and software. Repellers are inherently unsuitable to either hardware or software based on certain structural properties. The mapping of extremities and repellers is determined jointly by GC and their local preference.We then present an efficient ( O(N3 + N2B), for N nodes and B bins per node) heuristic for extended partitioning, called MIBS, that alternately uses GCLP and an implementation-bin selection procedure. The implementation-bin selection procedure chooses, for a node with already determined mapping, an implementation bin that maximizes the area-reduction gradient of as-yet unmapped nodes. Solutions generated by both heuristics are shown to be reasonably close to optimal. Extended partitioning generates considerably smaller overall hardware as compared to binary partitioning.

Managing complexity in heterogeneous system specification, simulation, and synthesis

System-level design is characterized by a behavioral specification and heterogeneous hardware/software implementations. Exploring the design space is essential for good design. Specifying and managing complex design flows, tracking dependencies and tool invocations, and maintaining consistency of design data and flows are key issues that enable efficient design space exploration. In order to manage the complexity of this design process, an infrastructure that manages these issues, transparent to the user, is presented. These concepts have been implemented in the Ptolemy environment within a framework called DesignMaker. An example design flow for multiprocessor synthesis is presented in some detail to illustrate the features of DesignMaker. The end objective of the framework is to facilitate a flexible system-level codesign assistant.

Symbolic computation in system simulation and design

This paper examines some of the roles that symbolic computation plays in assisting system- level simulation and design. By symbolic computation, we mean programs like Mathematica that perform symbolic algebra and apply transformation rules based on algebraic identities. At a behavioral level, symbolic computation can compute parameters, generate new models, and optimize parameter settings. At the synthesis level, symbolic computation can work in tandem with synthesis tools to rewrite cascade and parallel combinations on components in sub- systems to meet design constraints. Symbolic computation represents one type of tool that may be invoked in the complex flow of the system design process. The paper discusses the qualities that a formal infrastructure for managing system design should have. The paper also describes an implementation of this infrastructure called DesignMaker, implemented in the Ptolemy environment, which manages the flow of tool invocations in an efficient manner using a graphical file dependency mechanism.

Complexity management in system-level design

The system-level design problem spans a large design space. Typically, the designer needs to explore possible target architectures, experiment with different tools, and work with a range of constrains and optimization criteria. This design process is quite complex and involves considerable bookkeeping and management, in addition to sophisticated design tools. We believe that managing the design process is an important (although often neglected) part of system-level design. The contribution of this paper is in two parts. First, we present a framework for systematically managing the design process. Secondly, we illustrate how this framework can be used to manage a system-level design environment that consists of a suite of sophisticated hardware and software design tools.We begin by identifying some of the desirable features of system-level design methodology management. A candidate framework that manifests these features is presented. Complex design flows with iterative and conditional behavior can be specified within the framework. The framework also supports automated scheduling of tools in a well-defined design flow. It has been implemented as the DMM domain in Ptolemy.In the second part of the paper, we describe a case study that we have developed within this framework. The case study, called the Design Assistant, is a complete hardware-software codesign environment. It encapsulates various codesign tools for specification, partitioning, and synthesis; their interplay can be managed efficiently by the design methodology management framework.

A methodology for simulation and synthesis of mixed hardware/software systems

Summary form only given. A methodology for designing embedded DSP systems containing interacting hardware and software components is presented. The software typically comprises a program running on a programmable digital signal processor and the hardware consists of the processor, custom synthesized hardware modules, and the interface between the two. The methodology allows the designer to begin with a high-level dataflow description of the algorithm and generates a simulation model as well as a synthesizeable description for the entire system. The authors have implemented this mechanism within the Ptolemy framework as a heterogeneous target called the Design Assistant.<<ETX>>