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Dive into the research topics where Ashok K. Murugavel is active.

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Featured researches published by Ashok K. Murugavel.


IEEE Transactions on Very Large Scale Integration Systems | 2003

A game theoretic approach for power optimization during behavioral synthesis

Ashok K. Murugavel; Nagarajan Ranganathan

In this paper, we describe a new methodology based on game theory for minimizing the average power of a circuit during scheduling and binding in behavioral synthesis. The problems are formulated as auction-based noncooperative finite games for which solutions are proposed based on the Nash equilibrium. In the scheduling algorithm, a first-price sealed-bid auction approach is used while, for the binding algorithm, each functional unit in the datapath is modeled as a player bidding for executing an operation with the estimated power consumption as the bid. Further, the techniques of functional unit sharing, path balancing, and register assignment are incorporated within the binding algorithm for power reduction. The combined scheduling and binding algorithm is formulated as a single noncooperative auction game with the functional units in the datapath modeled as players bidding for executing the operation in a particular control cycle. The proposed algorithms yield power reduction without any increase in area overhead and only a slight increase in the latency for some of the benchmark circuits. Experimental results indicate that the proposed game theoretic solution for binding yields an improvement of 13.9% over the linear programming (LP) method, while the scheduling and the combined scheduling and binding algorithms yield average improvements of 6.3% and 11.8%, respectively, over the integer-linear programming (ILP) approach.


Journal of Homeland Security and Emergency Management | 2007

An Automated Decision Support System Based on Game Theoretic Optimization for Emergency Management in Urban Environments

Nagarajan Ranganathan; Upavan Gupta; Rashmi Shetty; Ashok K. Murugavel

In the context of multiple emergencies occurring in an urban environment, it is important to perform a fair allocation and scheduling of emergency response units to each emergency, as human lives could be at risk. In this work, a multi-emergency management system based on a single step, non-cooperative, normal form game model, and a Nash equilibrium based optimization methodology is proposed. In the proposed system, each emergency event is represented as a player in the game, who is competing with other players for the allocation of resource units that are available in limited quantities within a given urban perimeter. The Nash equilibrium based methodology identifies a socially fair allocation of resources depending on various fairness criteria like the demand by each emergency event, and the criticality of the events. The fairness criterion is well modeled in the game theoretic setting, while the criticality of an event can be modeled as per the requirements of a specific emergency management system. Such a system will be useful in managing emergencies in small to medium urban settings. The proposed game theoretic methodology naturally models the emergency response and resource deployment problem in the framework of social fairness, which is pivotal in these scenarios. The Nash equilibrium solution is computed using the Terje Hansens fixed-point algorithm. Experimental results are presented for various test cases and metrics are developed to establish the quantitative measure of fairness of the results. The proposed system can be used as a decision support tool for managing emergencies, or as a simulator for learning and training purposes.


international conference on vlsi design | 2003

A game-theoretic approach for binding in behavioral synthesis

Ashok K. Murugavel; Nagarajan Ranganathan

In this paper, we describe a new algorithm based on game theory for minimizing the average power of a circuit during binding in behavioral synthesis. The problem is formulated as an auction based non-cooperative finite game for which a solution is proposed based on the Nash equilibrium. For the binding algorithm, each functional unit in the datapath is modeled as a player bidding for executing an operation with the estimated power consumption as the bid. The operations are bound to the modules such that the total power consumption is minimized. Further, the techniques of functional unit sharing, path balancing and register assignment are incorporated within the binding algorithm for power reduction. The proposed algorithm yields power reduction without any increase in area or delay overhead. Experimental results indicate that the proposed game theoretic solution for binding yields an improvement of 13.9% over the linear programming (LP) method.


international conference on vlsi design | 2004

Game theoretic modeling of voltage and frequency scaling during behavioral synthesis

Ashok K. Murugavel; Nagarajan Ranganathan

Frequency scaling has recently become an important area for exploration with respect to power and energy optimization. In this work, we describe a new methodology for simultaneous voltage and frequency scaling during scheduling in behavioral synthesis based on game theory for power and energy reduction. The problem of scheduling in synthesis is formulated as an auction based non-cooperative finite game, for which solutions are developed based on the Nash equilibrium function. Each operation in the data-path is modeled as a player bidding for executing an operation in the given control cycle, with the estimated power consumption as the bid. We develop game theoretic models and propose a resource constrained algorithm. Experimental results on selected benchmark circuits show that the proposed algorithm yields about 42.5% energy savings on the average.


international conference on vlsi design | 2004

Gate sizing and buffer insertion using economic models for power optimization

Ashok K. Murugavel; Nagarajan Ranganathan


IEEE Transactions on Very Large Scale Integration Systems | 2002

Least-square estimation of average power in digital CMOS circuits

Ashok K. Murugavel; Nagarajan Ranganathan; R. Chandramouli; Srinath Chavali


IEEE Transactions on Very Large Scale Integration Systems | 2003

Petri net modeling of gate and interconnect delays for power estimation

Ashok K. Murugavel; Nagarajan Ranganathan


international conference on vlsi design | 2001

Average power in digital CMOS circuits using least square estimation

Ashok K. Murugavel; Nagarajan Ranganathan; Ramamurti Chandramouli; Srinath Chavali


asia and south pacific design automation conference | 2002

A Real Delay Switching Activity Simulator based on Petri net Modeling

Ashok K. Murugavel; Nagarajan Ranganathan


international conference on computer design | 2003

A microeconomic model for simultaneous gate sizing and voltage scaling for power optimization

Nagarajan Ranganathan; Ashok K. Murugavel

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Srinath Chavali

University of South Florida

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R. Chandramouli

Stevens Institute of Technology

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Upavan Gupta

University of South Florida

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